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- ...microprocessors of the [[amd/k6|K6]] family. Other members used the [[amd/packages/super socket 7|CPGA-321]] and {{\\|CBGA-360}} package.2 KB (309 words) - 18:42, 25 July 2020
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2 KB (295 words) - 04:45, 2 December 2016
- ...ned by [[Intel]] for their {{intel|5 Series}} chipset. It's considered a {{packages|Socket-G1}} type although it's not socket-mounted and is instead permanentl2 KB (274 words) - 18:31, 1 December 2016
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2 KB (275 words) - 22:17, 12 April 2017
- |predecessor link=amd/packages/socket fm2+ |predecessor 2 link=amd/packages/socket am3+30 KB (6,098 words) - 01:58, 12 January 2024
- #REDIRECT [[amd/packages/socket am4]]37 bytes (5 words) - 08:59, 21 July 2020
- #REDIRECT [[intel/packages/lga-1567]]37 bytes (4 words) - 02:06, 10 January 2017
- #REDIRECT [[amd/packages/socket am4]]37 bytes (5 words) - 08:59, 21 July 2020
- ...s socket accepts Intel's 1151-pin flip-chip land grid array (FCLGA-1151) [[packages]]. This socket is used for Intel's 6th generation, 7th generation, and 8th2 KB (343 words) - 01:34, 6 September 2019
- |successor link=amd/packages/socket strx4 |successor 2 link=amd/packages/socket swrx886 KB (17,313 words) - 02:48, 13 March 2023
- #REDIRECT [[amd/packages/socket_tr4]]37 bytes (5 words) - 14:52, 11 August 2018
- |predecessor link=amd/packages/socket g34 |successor link=amd/packages/socket sp5110 KB (21,122 words) - 02:46, 13 March 2023
- * Lidded and lidless (mobile processors) packages OPGA-754 lidded package. Pin AG10 MEMRESET_L is NC on lidless packages.5 KB (662 words) - 09:51, 29 January 2020
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4 KB (576 words) - 15:27, 30 January 2020
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4 KB (490 words) - 22:47, 9 February 2020
- #REDIRECT [[amd/packages/socket strx4]]39 bytes (5 words) - 17:07, 15 April 2022
- #REDIRECT [[amd/packages/socket swrx8]]39 bytes (5 words) - 17:08, 15 April 2022
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7 KB (1,029 words) - 18:40, 22 February 2020
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8 KB (1,212 words) - 19:01, 22 February 2020
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12 KB (1,960 words) - 12:23, 18 July 2020
- |predecessor link=amd/packages/socket_am3 |successor link=amd/packages/socket_am46 KB (822 words) - 15:01, 9 December 2022
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3 KB (481 words) - 16:24, 16 March 2023
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4 KB (527 words) - 16:25, 16 March 2023
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14 KB (2,611 words) - 00:31, 4 April 2022
- ...e [[AMD]] K6 microprocessor. Other members of the K6 family used the [[amd/packages/super socket 7|CPGA-321]] and {{\\|OBGA-349}} package.2 KB (293 words) - 17:41, 25 July 2020
- ...embedded processors AMD developed the {{\\|CBGA-360}} and {{\\|OBGA-349}} packages. Super Socket 7 was superseded by {{\\|Slot A}}.6 KB (935 words) - 09:30, 27 July 2020
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7 KB (1,063 words) - 15:50, 4 September 2020
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5 KB (770 words) - 15:12, 4 September 2020
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5 KB (727 words) - 15:34, 4 September 2020
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5 KB (645 words) - 16:31, 16 March 2023
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4 KB (610 words) - 16:33, 16 March 2023
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4 KB (543 words) - 16:33, 16 March 2023
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4 KB (580 words) - 13:34, 7 September 2020
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5 KB (755 words) - 13:50, 7 September 2020
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5 KB (642 words) - 14:08, 7 September 2020
- #REDIRECT [[amd/packages/socket am1]]37 bytes (5 words) - 14:14, 7 September 2020
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4 KB (641 words) - 23:21, 25 March 2023
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5 KB (630 words) - 23:22, 25 March 2023
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3 KB (404 words) - 16:38, 16 March 2023
- ...vailable in the smaller {{\\|FT3b}} and {{\\|FT4}} BGA packages and in PGA packages for {{\\|Socket FM2+}} and {{\\|Socket AM4}}. FP4 is the successor to the {5 KB (679 words) - 23:22, 25 March 2023
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5 KB (642 words) - 23:22, 25 March 2023
- All FP6 packages carry a monolithic die which integrates eight CPU cores, two memory control20 KB (3,273 words) - 17:47, 10 May 2023
- ...cket systems. Uniprocessor Opterons with a DDR2 interface were released in packages for {{\\|Socket AM2}} and {{\\|Socket AM2+|AM2+}} with a single HT link. So ...cessors support UDIMMs instead of RDIMMs. Socket Fr3 is incompatible with packages for other revisions.11 KB (1,717 words) - 17:25, 5 February 2021
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8 KB (1,126 words) - 18:53, 12 January 2021
- #REDIRECT [[amd/packages/socket s1g1]]38 bytes (6 words) - 18:55, 12 January 2021
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8 KB (1,211 words) - 19:08, 12 January 2021
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5 KB (767 words) - 19:14, 12 January 2021
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10 KB (1,781 words) - 19:23, 12 January 2021
- ...links. Uniprocessor Opterons with DDR3 memory controllers were released in packages for {{\\|Socket AM3}} and {{\\|Socket AM3+|AM3+}} which support two memory Socket C32 has the same dimensions as Socket F, however the LGA-1207 packages for these sockets are mechanically, due to keying notches in different posi7 KB (998 words) - 20:07, 7 February 2021
- ...generations. Uniprocessor Opterons with a DDR3 interface were released in packages for {{\\|Socket AM3}} and {{\\|Socket AM3+|AM3+}} which make a single HT li36 KB (7,214 words) - 15:50, 23 April 2022
- #REDIRECT [[amd/packages/socket g34]]37 bytes (5 words) - 20:50, 7 February 2021
- #REDIRECT [[amd/packages/socket c32]]37 bytes (5 words) - 20:50, 7 February 2021
- #REDIRECT [[amd/packages/socket am3+]]38 bytes (5 words) - 20:51, 7 February 2021
- #REDIRECT [[amd/packages/socket f]]35 bytes (5 words) - 21:07, 7 February 2021
- #REDIRECT [[amd/packages/socket f]]35 bytes (5 words) - 21:07, 7 February 2021
- #REDIRECT [[amd/packages/socket f]]35 bytes (5 words) - 21:08, 7 February 2021
- |contemporary link=amd/packages/sp4r2 '''SP4''' and its contemporary '''{{amd|SP4r2|l=pack}}''' are microprocessor packages of [[AMD]] {{amd|epyc embedded#3000 Series (Zen)|EPYC 3000}} "{{amd|Snowy O7 KB (1,088 words) - 05:09, 24 March 2023
- |contemporary link=amd/packages/sp4 '''SP4r2''' and its contemporary '''{{amd|SP4|l=pack}}''' are microprocessor packages of [[AMD]] {{amd|epyc embedded#3000 Series (Zen)|EPYC 3000}} "{{amd|Snowy O7 KB (1,011 words) - 05:09, 24 March 2023
- |predecessor link=amd/packages/socket tr4 |contemporary link=amd/packages/socket strx411 KB (1,577 words) - 02:53, 13 March 2023
- |predecessor link=amd/packages/socket tr4 |contemporary link=amd/packages/socket swrx814 KB (2,188 words) - 11:45, 6 April 2024
- #REDIRECT [[amd/packages/socket sp3]]37 bytes (5 words) - 17:51, 16 April 2022
- #REDIRECT [[amd/packages/socket tr4]]37 bytes (5 words) - 15:44, 17 April 2022
- #REDIRECT [[amd/packages/socket tr4]]37 bytes (5 words) - 15:45, 17 April 2022
- #REDIRECT [[amd/packages/socket tr4]]37 bytes (5 words) - 15:45, 17 April 2022
- |predecessor link=amd/packages/socket sp3 ...essor {{\\|Socket SP3}}. ({{\\|SP4|SP4 and SP4r2}} are [[ball grid array]] packages of {{amd|epyc embedded#3000 Series (Zen)|EPYC 3000}} embedded processors.)105 KB (21,123 words) - 02:59, 13 March 2023
- #REDIRECT [[amd/packages/socket sp5]]37 bytes (5 words) - 19:25, 18 April 2022
- |predecessor link=amd/packages/socket am4 ...1718 land pads. The socket is not designed to be functional with unlidded packages.19 KB (3,162 words) - 17:35, 11 May 2023
- #REDIRECT [[amd/packages/socket am5]]37 bytes (5 words) - 20:06, 18 April 2022
- #REDIRECT [[amd/packages/socket am4]]37 bytes (5 words) - 16:48, 20 April 2022
- |successor link=amd/packages/socket s1 |contemporary link=amd/packages/socket a6 KB (849 words) - 21:29, 13 May 2023
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38 bytes (4 words) - 02:35, 17 May 2023
Page text matches
- ...edia Interface}} 1.0. All processors use [[packages/socket-g1|PGA-988]] ([[packages/socket-g1|Socket G1]]) packaging. They all have the following features: ...face}} 1.0 and introduced {{x86|AES}} instructions. These processors use {{packages|Socket-G1}}. They all have the following features:43 KB (5,739 words) - 21:30, 22 April 2024
- ...is attractive where performance is more important than cost. Flip-chip BGA packages can be mounted using standard [[printed circuit board]]s and can be replace ...d, high density ceramic substrates or organic laminate. Additionally fcBGA packages are often offered in bare die, flat lid, and full lid configuration. They a2 KB (239 words) - 07:17, 17 December 2013
- |package module 1={{packages/pdip-28}} |package module 2={{packages/cdip-28}}617 bytes (77 words) - 16:03, 13 December 2017
- ...h the [[Intel 4004]]. The chip came in 16-pin [[Dual in-line package|DIP]] packages. The HD35404 was part of the [[Hitachi HMCS-4]], an [[Intel MCS-4]] clone.1 KB (157 words) - 01:34, 24 December 2015
- ...ters may be formed by powering selected LED elements. SSDs come in various packages and pin arranges.4 KB (490 words) - 09:47, 24 July 2019
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1 KB (209 words) - 20:19, 26 November 2015
- ...packages]]. Most designers are thus restricted to one of those pre-defined packages. Sometimes the device that's designed does not utilize all the pins for var2 KB (238 words) - 20:56, 26 November 2015
- |package module 1={{packages/intel/fcbga-1364}}4 KB (404 words) - 16:22, 13 December 2017
- |package module 1={{packages/intel/fcbga-1364}}3 KB (401 words) - 14:24, 12 February 2019
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- |package module 1={{packages/intel/fclga-1151}}4 KB (627 words) - 16:17, 13 December 2017
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- |package module 1={{packages/intel/fcbga-1356}}4 KB (640 words) - 02:21, 16 January 2019
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- |package module 1={{packages/intel/fcbga-1364}}4 KB (407 words) - 16:22, 13 December 2017
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- The MC14500B came in a few different packages for different specifications.2 KB (232 words) - 16:31, 13 December 2017
- ...2 mm² {{intel|FCBGA-441}} package. Models ending in ''P'' use those large packages. A couple of models (those ending with 'T') also support industrial tempera17 KB (2,292 words) - 09:32, 16 July 2019
- ! Part !! [[clock generator|Clock]] !! OP Temp !! Packages !! Notes4 KB (514 words) - 00:54, 19 May 2016
- ...replaced with {{intel|Direct Media Interface}} 1.0. These processors use {{packages|Socket-G1}}. They all have the following features: ...were introduced in mid-[[2011]]. Mobile Pentium uses {{intel|FCBGA-1023}} packages and {{intel|rPGA988B}} for B models. Sandy Bridge incorporated the [[integr20 KB (2,661 words) - 00:45, 11 October 2017
- ...replaced with {{intel|Direct Media Interface}} 1.0. These processors use {{packages|Socket-G1}}. They all have the following features:25 KB (3,201 words) - 03:13, 22 September 2018
- | type = System in packages13 KB (1,784 words) - 08:04, 6 April 2019
- ...those years were the [[TO-5]] and [[TO-18]] (Transistor Outline) metal-can packages.502 bytes (66 words) - 23:04, 20 May 2018
- ...5]] and [[TO-18]] (Transistor Outline) metal-can packages and dual in-line packages.902 bytes (119 words) - 23:04, 20 May 2018
- ...those years were the [[TO-5]] and [[TO-18]] (Transistor Outline) metal-can packages.524 bytes (70 words) - 23:04, 20 May 2018
- Sandy Bridge comes in three different [[C4]] packages: [[PGA]] for mobile computers, [[LGA]] for desktop systems and [[BGA]] for84 KB (13,075 words) - 00:54, 29 December 2020
- === Packages ===79 KB (11,922 words) - 06:46, 11 November 2022
- === Packages ===38 KB (5,431 words) - 10:41, 8 April 2024
- ** New Type3, Type4 packages The new Ice Lake packages include a thin-film magnetic inductor array on the landing side. Those are23 KB (3,613 words) - 12:31, 20 June 2021
- |package module 1={{packages/intel/pga-988b}}5 KB (710 words) - 16:24, 13 December 2017
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- ...replaced with {{intel|Direct Media Interface}} 1.0. These processors use {{packages|Socket-G1}}. They all have the following features:25 KB (3,397 words) - 03:12, 3 October 2022
- ...face}} 1.0 and introduced {{x86|AES}} instructions. These processors use {{packages|Socket-G1}}. They all have the following features:34 KB (4,663 words) - 20:38, 20 February 2023
- ...an {{intel|80186}}-based microprocessor manufactured by [[AMD]] in PQFP-80 packages. This model is a redesigned CMOS version that operated at 10 MHz and introd3 KB (279 words) - 15:17, 13 December 2017
- ...an {{intel|80186}}-based microprocessor manufactured by [[AMD]] in PQFP-80 packages. This model is a redesigned CMOS version that operated at 12.5 MHz and intr3 KB (284 words) - 15:17, 13 December 2017
- ...an {{intel|80186}}-based microprocessor manufactured by [[AMD]] in PQFP-80 packages. This model is a redesigned CMOS version that operated at 16 MHz and introd3 KB (284 words) - 15:17, 13 December 2017
- ...an {{intel|80186}}-based microprocessor manufactured by [[AMD]] in PQFP-80 packages. This model is a redesigned CMOS version that operated at 20 MHz and introd3 KB (284 words) - 15:17, 13 December 2017
- ...an {{intel|80186}}-based microprocessor manufactured by [[AMD]] in PQFP-80 packages. This model is a redesigned CMOS version that operated at 25 MHz and introd3 KB (284 words) - 15:17, 13 December 2017