Semiconductor & Computer Engineering
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Package ASB1 - AMD
| Edit Values | |
| ASB1 | |
| General Info | |
| Designer | AMD |
| Introduction | January 8, 2009 (launched) |
| Market | Mobile |
| Microarchitecture | K8 |
| TDP | 18 W 18,000 mW 0.0241 hp 0.018 kW |
| Package | |
| Name | ASB1 |
| Type | Organic Micro Ball Grid Array |
| Contacts | 812 |
| Dimension | 27 mm 2.7 cm × 27 mm1.063 in 2.7 cm 1.063 in |
| Pitch | 0.8 mm 0.0315 in |
ASB1 was a BGA-812 package for low power AMD mobile microprocessors with an integrated DDR2 memory controller targeting the small form factor desktop, mobile and embedded market. Its counterparts for the mainstream mobile and desktop markets are Socket S1 and Socket AM2. ASB1 was superseded by the ASB2 package.
Package ASB1 was used in AMD's first and second platform for ultrathin notebooks codenamed "Yukon" and "Congo". All ASB1 processors belong to AMD's NPT Family 0Fh, use the K8 microarchitecture, and were manufactured in a 65 nm SOI process.
Contents
Features[edit]
- 812-pin lidless micro ball grid array package, 0.8-1.6 mm multi-pitch, 33 × 33 pins, 27 × 27 mm, organic substrate
- 16 bit HyperTransport 1.0 interface up to 800 MHz, 1600 MT/s, 3.2 Gbyte/s in each direction
- 128/144 bit DDR2 SDRAM interface up to 333 MHz, PC-5300 (DDR2-667), 10.7 Gbyte/s
- Up to 2 SODIMMs, SEC-DED ECC, JEDEC SSTL_1.8
- P-States, ACPI C1, C1E, C2, C3, S3, S5
- Thermal diode, overtemperature protection
Chipsets[edit]
- AMD RS780M
Processors using package ASB1[edit]
- AMD Turion Neo X2 codename "Conesus"
- AMD Athlon Neo X2 "Conesus"
- AMD Athlon Neo "Huron"
- AMD Sempron "Huron"
| List of all ASB1-based Processors | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Model | Price | Process | Launched | µarch | Family | Core | C | T | Freq | Turbo | TDP | ||||||||
| Count: 0 | |||||||||||||||||||
Package Diagram[edit]
No data available. Approximate dimensions of the Athlon Neo "Huron" package. All dimensions in millimeters.
BGA-812 package pin (ball) numbering.
Pin Map[edit]
References[edit]
- "BIOS and Kernel Developer’s Guide for AMD NPT Family 0Fh Processors", AMD Publ. #32559, Rev. 3.16, November 2009
- "Revision Guide for AMD NPT Family 0Fh Processors", AMD Publ. #33610, Rev. 3.48, December 2011
- 2nd Gen AMD Ultrathin Platform, amd.com, archived February 2010
See also[edit]
Facts about "Package ASB1 - AMD"
| designer | AMD + |
| first launched | January 8, 2009 + |
| instance of | package + |
| market segment | Mobile + |
| microarchitecture | K8 + |
| name | ASB1 + |
| package | ASB1 + |
| package contacts | 812 + |
| package length | 27 mm (2.7 cm, 1.063 in) + |
| package pitch | 0.8 mm (0.0315 in) + |
| package type | Organic Micro Ball Grid Array + |
| package width | 27 mm (2.7 cm, 1.063 in) + |
| tdp | 18 W (18,000 mW, 0.0241 hp, 0.018 kW) + |
