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14 nm lithography process

The 14 nanometer (14 nm) lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 16 nm and 10 nm processes. The term "14 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. Commercial integrated circuit manufacturing using 14 nm process began in 2014. This technology is set to be replaced with 10 nm process in 2017.

Industry[edit]

14 nm became Intel's 2nd generation finFET transistors. This process became Samsungs' and GlobalFoundries first generation of finFet-based transistors. Intel uses TiN pMOS / TiAlN nMOS while Samsung uses TiN pMOS / TiAIC nMOS as work function metals.

Fab
Process Name​
1st Production​
Type​
Wafer​
 ​
Fin Pitch​
Fin Width​
Fin Height​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HP)​
SRAM bit cell (HD)​
DRAM bit cell
Intel Samsung GlobalFoundries UMC IBM
P1272 (CPU) / P1273 (SoC) 14LPE
1st generation; 14 nm Low Power Early
, 14LPP
2nd generation; 14 nm Low Power Performance
, 14LPC
3rd generation; 14 nm Low Power Cost [reduced]
, 14LPU
4th generation; 14 nm Low Power Ultimate
14LPP
2nd generation; 14 nm Low Power Performance
2014 2015 2015 2017 2015
Bulk FinFET SOI FinFET
300mm
Value 22 nm Δ Value 20 nm Δ Value 20 nm Δ Value 28 nm Δ Value 22 nm Δ
42 nm 0.70x 48 nm N/A 48 nm N/A  ? nm N/A 42 nm N/A
8 nm 1.00x 8 nm 8 nm  ? nm 10 nm
42 nm 1.24x ~38 nm ~38 nm  ? nm 25 nm
70 nm 0.78x 78 nm 1.22x 78 nm 1.22x  ? nm  ?x 80 nm 0.80x
52 nm 0.65x 64 nm 1.00x 64 nm 1.00x  ? nm  ?x 64 nm 0.80x
0.0588 µm² 0.54x 0.0806 µm²  ?x 0.0806 µm²  ?x  ? µm²  ?x 0.900 µm²
0.064 µm²  ?x 0.064 µm²  ?x  ? µm²  ?x 0.081 µm² 0.81x
 ? µm²  ?x 0.0174 µm² 0.67x

Intel[edit]

intel 14nm gate.png

Find models[edit]

Click to browse all 14 nm MPU models

14 nm Microprocessors[edit]

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14 nm Microarchitectures[edit]

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Documents[edit]