From WikiChip
50 µm lithography process

The 50 µm lithography process was the semiconductor process technology used by early semiconductor companies during the mid 1960s. This process had an effective channel (Alu) length of roughly 50 µm between the source and drain. The typical wafer size for this process at companies such as Fairchild was 0.875 inch (22 mm). The standard transistor packages those years were the TO-5 and TO-18 (Transistor Outline) metal-can packages.

Text document with shapes.svg This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.