The 5μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process was later superseded by 3 µm, 2 µm, and 1.5 µm processes.

Industry

HP's NMOS II was a second generation nMOD process which was a shrink of their previous generation 7 µm nMOS also developed by HP's Loveland Division. The shrink was done in the hope they could double the speed while doubling density. Loveland went on on to create a third and final process, the NMOS III using a 1.5 µm process. While they succeeded in doubling the density and more than ten-folding the speed, the complexity of the chip still required them to fabricate it on 3 separate dies and package them together. Intel introduced their 2116 in 1976, the first 16 Kib DRAM which was also implemented using 5 micron design rules.

Foundry
Process Name
1st Production
Wafer	Type
	Size
Transistor	Technology
	Type
	Voltage
Metal Layers
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcell	High-Perf (HP)
	High-Density (HD)
	Low-Voltage (LV)
DRAM bitcell	eDRAM

Intel		HP
		NMOS II
1976		1973
Bulk		Bulk
51 mm		51 mm
nMOS		nMOS
Planar		Planar
5 V		5 V
1, 2
Value	8 µm Δ	Value	7 µm Δ
5 µm	0.63x	5 µm	0.71x
435 µm²	0.34x

5µm Microprocessors

• HP
  • 5061-30xx
• Bell Labs
  • BELLMAC-8

This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.