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Xeon E3-1240L v5 - Intel
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Xeon E3-1240L v5
skylake dt (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberE3-1240L v5
Part NumberCM8066201935808
S-SpecSR2CW, SR2LN
MarketServer
IntroductionOctober 19, 2015 (announced)
October 19, 2015 (launched)
Release Price$278
ShopAmazon
General Specs
FamilyXeon E3
SeriesE3-1200 v5
LockedYes
Frequency2,100 MHz
Turbo FrequencyYes
Turbo Frequency3,200 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier21
CPUID506E3
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
PlatformGreenlow
ChipsetSunrise Point
Core NameSkylake DT
Core Family6
Core Model94
Core SteppingR0
Process14 nm
TechnologyCMOS
Die122 mm²
Word Size64 bit
Cores4
Threads8
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP25 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C
FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Xeon E3-1240L v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 2.1 GHz with turbo boost of 3.2 GHz. The E3-1240L v5 has a TDP of 25 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back

L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

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Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

This chip has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1240L v5 - Intel#package + and Xeon E3-1240L v5 - Intel#io +
base frequency2,100 MHz (2.1 GHz, 2,100,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetSunrise Point +
clock multiplier21 +
core count4 +
core family6 +
core model94 +
core nameSkylake DT +
core steppingR0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
cpuid506E3 +
designerIntel +
die area122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) +
familyXeon E3 +
first announcedOctober 19, 2015 +
first launchedOctober 19, 2015 +
full page nameintel/xeon e3/e3-1240l v5 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateOctober 19, 2015 +
main imageFile:skylake dt (front).png +
manufacturerIntel +
market segmentServer +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE3-1240L v5 +
nameXeon E3-1240L v5 +
packageFCLGA-1151 +
part numberCM8066201935808 +
platformGreenlow +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 278.00 (€ 250.20, £ 225.18, ¥ 28,725.74) +
s-specSR2CW + and SR2LN +
seriesE3-1200 v5 +
smp max ways1 +
socketLGA-1151 +
supported memory typeDDR3L-1600 + and DDR4-2133 +
tdp25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count8 +
turbo frequency (1 core)3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +