Latest revision as of 16:01, 26 March 2019

Semiconductor lithography processes technology

1 nm • 18A 2 nm • 3 nm 5 nm • 7 nm 10 nm • 12 nm 14 nm • 16 nm 20 nm • 22 nm 28 nm • 32 nm 40 nm • 45 nm 55 nm • 65 nm 80 nm • 90 nm 110 nm • 130 nm 150 nm • 180 nm 220 nm • 240 nm 250 nm • 280 nm 350 nm • 500 nm 600 nm • 650 nm 700 nm • 750 nm 800 nm 1 µm • 1.2 µm 1.3 µm • 1.5 µm 2 µm • 2.5 µm 3 µm • 3.5 µm 5 µm • 6 µm 7 µm • 8 µm 10 µm • 16 µm 20 µm • 50 µm

v · d · e

The 28 nanometer (28 nm) lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 32 nm and 22 nm processes. Commercial integrated circuit manufacturing using 28 nm process began in 2011. This technology superseded by commercial 22 nm process.

Industry[edit]

28 nm Microprocessors[edit]

• AMD
  • A8
  • A10
  • A9
• HiSilicon
  • Kirin
• Intel (Fab'ed by TSMC)
  • Atom x3
• MediaTek
  • Helio
• Phytium
  • FT-1500A
• PEZY
  • PEZY-SC
  • PEZY-SCnp
• Renesas
  • R-Car
• Xiaomi
  • Surge

This list is incomplete; you can help by expanding it.

28 nm Microarchitectures[edit]

• AMD
  • Steamroller
  • Excavator
• ARM Holdings
  • Cortex-A53
• Nervana
  • Lake Crest
• Movidius
  • SHAVE v3.0
• Phytium
  • Xiaomi
  • Mars I
• VIA Technologies
  • Isaiah II
• Zhaoxin
  • ZhangJiang
  • WuDaoKou

This list is incomplete; you can help by expanding it.

References[edit]

• Samsung foundry solution for 32 & 28 nm
• Wu, Shien-Yang, et al. "A highly manufacturable 28nm cmos low power platform technology with fully functional 64mb sram using dual/tripe gate oxide process." VLSI Technology, 2009 Symposium on. IEEE, 2009.
• Shang, Huiling, et al. "High performance bulk planar 20nm CMOS technology for low power mobile applications." VLSI Technology (VLSIT), 2012 Symposium on. IEEE, 2012.
• Arnaud, F., et al. "Competitive and cost effective high-k based 28nm CMOS technology for low power applications." Electron Devices Meeting (IEDM), 2009 IEEE International. IEEE, 2009.
• Yuan, J., et al. "Performance elements for 28nm gate length bulk devices with gate first high-k metal gate." Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on. IEEE, 2010.
• Liang, C. W., et al. "A 28nm poly/SiON CMOS technology for low-power SoC applications." VLSI Technology (VLSIT), 2011 Symposium on. IEEE, 2011.
• James, Dick. "High-k/metal gates in the 2010s." Advanced Semiconductor Manufacturing Conference (ASMC), 2014 25th Annual SEMI. IEEE, 2014.