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Difference between revisions of "500 nm lithography process"

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* AMD
 
* AMD
 
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** {{amd|microarchitectures/k5|K5}}
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* Intel
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** {{intel|80186|l=arch}} (embedded [[IP cores]] only)
 
{{expand list}}
 
{{expand list}}

Revision as of 14:49, 2 January 2017

basic wafer drawing.svg Semiconductor lithography processes technology
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The 500 nanometer (500 nm) lithography process is a full node semiconductor manufacturing process following the 600 nm process. Commercial integrated circuit manufacturing using 500 nm process began in 1992. 500 nm and was phased out and later replaced by 350 nm in 1995.

Industry

Fab
Process Name​
1st Production​
Metal Layers​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Intel AMD DEC Fujitsu Hitachi HP IBM TI Motorola National (BiCMOS)
P852 CS-24 CMOS-5 CMOS14C CMOS-5X HiPerMOS 1 ABiC V
1994 1993 1993 1994 1994 1996 1994 1995 1995
3 4 3 4 5 4 4
Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ Value 800 nm Δ
 ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x
 ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x
44 µm2 0.40x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x

500 nm Microprocessors

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500 nm Microarchitectures

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