Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "40 nm lithography process"
(Created page with "{{lithography processes}} The '''40 nm lithography process''' is a half-node semiconductor manufacturing process used as a stopgap between the ...") |
|||
| Line 1: | Line 1: | ||
{{lithography processes}} | {{lithography processes}} | ||
The '''40 nm lithography process''' is a [[technology node#half node|half-node]] semiconductor manufacturing process used as a stopgap between the [[45 nm lithography process|45 nm]] and [[32 nm lithography process|32 nm]] processes. Commercial [[integrated circuit]] manufacturing using 40 nm process began in 2008 by leading semiconductor companies such as [[TSMC]]. This technology superseded by commercial [[32 nm lithography process|32 nm process]] by 2010. | The '''40 nm lithography process''' is a [[technology node#half node|half-node]] semiconductor manufacturing process used as a stopgap between the [[45 nm lithography process|45 nm]] and [[32 nm lithography process|32 nm]] processes. Commercial [[integrated circuit]] manufacturing using 40 nm process began in 2008 by leading semiconductor companies such as [[TSMC]]. This technology superseded by commercial [[32 nm lithography process|32 nm process]] by 2010. | ||
| + | |||
| + | == Industry == | ||
| + | |||
| + | === Samsung === | ||
| + | {| class="wikitable" | ||
| + | |- | ||
| + | | || Measurement || Scaling from [[65 nm]] | ||
| + | |- | ||
| + | | Contacted Gate Pitch || 129 nm || 0.65x | ||
| + | |- | ||
| + | | Interconnect Pitch (M1P) || 117 nm || 0.65x | ||
| + | |- | ||
| + | | [[SRAM]] bit cell || ? µm<sup>2</sup> || ?x | ||
| + | |} | ||
== 40 nm Microprocessors == | == 40 nm Microprocessors == | ||
Revision as of 22:07, 23 April 2016
Semiconductor lithography processes technology
The 40 nm lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 45 nm and 32 nm processes. Commercial integrated circuit manufacturing using 40 nm process began in 2008 by leading semiconductor companies such as TSMC. This technology superseded by commercial 32 nm process by 2010.
Industry
Samsung
| Measurement | Scaling from 65 nm | |
| Contacted Gate Pitch | 129 nm | 0.65x |
| Interconnect Pitch (M1P) | 117 nm | 0.65x |
| SRAM bit cell | ? µm2 | ?x |
40 nm Microprocessors
This list is incomplete; you can help by expanding it.
40 nm System on Chips
This list is incomplete; you can help by expanding it.