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Difference between revisions of "28 nm lithography process"

(→‎28 nm Microprocessors)
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| 90 nm || 0.70x || 117 nm || 0.72x || ?nm || ?x || ?nm || ?x || ?nm || ?x
 
| 90 nm || 0.70x || 117 nm || 0.72x || ?nm || ?x || ?nm || ?x || ?nm || ?x
 
|-
 
|-
−
| 96 nm || 0.82x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x
+
| 96 nm || 0.82x || 95 nm || 0.81x || ?nm || ?x || ?nm || ?x || ?nm || ?x
 
|-
 
|-
−
| 0.120 µm<sup>2</sup> || ?x || 0.127 µm<sup>2</sup> || 0.52x || 0.120 µm<sup>2</sup> || ?x || 0.120 µm<sup>2</sup> || ?x || 0.124 µm<sup>2</sup> || ?x
+
| 0.120 µm² || ?x || 0.127 µm² || 0.52x || 0.120 µm² || ?x || 0.120 µm² || ?x || 0.124 µm² || ?x
 
|-
 
|-
−
|  || || 0.155 µm<sup>2</sup> || || || || 0.197 µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x
+
|  || || 0.155 µm² || || || || 0.197 µm² || ?x || ? µm² || ?x
 
|-
 
|-
−
|  || || || || || || 0.152 µm<sup>2</sup> || ?x || ||
+
|  || || || || || || 0.152 µm² || ?x || ||
 
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Revision as of 19:15, 15 March 2017

basic wafer drawing.svg Semiconductor lithography processes technology
v · d · e

The 28 nanometer (28 nm) lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 32 nm and 22 nm processes. Commercial integrated circuit manufacturing using 28 nm process began in 2011. This technology superseded by commercial 22 nm process.

Industry

Fab
Wafer​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HD)​
SRAM bit cell (LP)​
SRAM bit cell (HC)
Samsung TSMC GlobalFoundries STMicroelectronics UMC
300mm
Value 40 nm Δ Value 40 nm Δ Value 40 nm Δ Value 40 nm Δ Value 40 nm Δ
90 nm 0.70x 117 nm 0.72x  ?nm  ?x  ?nm  ?x  ?nm  ?x
96 nm 0.82x 95 nm 0.81x  ?nm  ?x  ?nm  ?x  ?nm  ?x
0.120 µm²  ?x 0.127 µm² 0.52x 0.120 µm²  ?x 0.120 µm²  ?x 0.124 µm²  ?x
0.155 µm² 0.197 µm²  ?x  ? µm²  ?x
0.152 µm²  ?x

28 nm Microprocessors

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28 nm Microarchitectures

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