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The '''10 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[14 nm lithography process|14 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 10 nm process is set to begin in 2017. This technology is set to be replaced by [[7 nm lithography process|7 nm process]] 2019.
 
The '''10 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[14 nm lithography process|14 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 10 nm process is set to begin in 2017. This technology is set to be replaced by [[7 nm lithography process|7 nm process]] 2019.
 
== Industry ==
 
== Industry ==
−
 
+
{{scrolling table/top|style=text-align: right; | first=Fab
−
=== Intel ===
+
| 
−
{| class="wikitable"
+
|Fin Pitch
 +
|Contacted Gate Pitch
 +
|Interconnect Pitch (M1P)
 +
|SRAM bit cell (HP)
 +
|SRAM bit cell (HD)
 +
}}
 +
{{scrolling table/mid}}
 
|-
 
|-
−
| || Measurement || Scaling from [[14 nm]]
+
! colspan="2" | [[Intel]] !! colspan="2" | [[Samsung]] !! colspan="2" | [[TSMC]]
 
|-
 
|-
−
| Fin Pitch || ? nm || ?x
+
! Value !! [[14 nm]] Δ !! Value !! [[14 nm]] Δ !! Value !! [[16 nm]] Δ
 
|-
 
|-
−
| Contacted Gate Pitch || 55 nm || 0.78x
+
| ? nm || ?x || ? nm || ?x || ? nm || ?x
 
|-
 
|-
−
| Interconnect Pitch (M1P) || 38 nm || 0.74x
+
| 55 nm || 0.78x || 64 nm || 0.82x || 70 nm || 0.78x
 
|-
 
|-
−
| [[SRAM]] bit cell || ? µm<sup>2</sup> || ?x
+
| 38 nm || 0.74x  || 48 nm || 0.75x || 46 nm || 0.72x
−
|}
 
−
 
 
−
=== Global Foundries / Samsung ===
 
−
{| class="wikitable"
 
 
|-
 
|-
−
| || Measurement || Scaling from [[14 nm]] || Notes
+
| ? µm<sup>2</sup> || ?x || 0.049 µm<sup>2</sup> || 0.61x || ? µm<sup>2</sup> || ?x
 
|-
 
|-
−
| Fin Pitch || ? nm || ?x ||
+
| ? µm<sup>2</sup> || ?x || 0.040 µm<sup>2</sup> || 0.63x || ? µm<sup>2</sup> || ?x
−
|-
+
{{scrolling table/end}}
−
| Contacted Gate Pitch || 64 nm || 0.82x ||
 
−
|-
 
−
| Interconnect Pitch (M1P) || 48 nm || 0.75x ||
 
−
|-
 
−
| [[SRAM]] bit cell || 0.049 µm<sup>2</sup> || 0.61x || High Performance
 
−
|-
 
−
| [[SRAM]] bit cell || 0.04 µm<sup>2</sup> || 0.63x || High Density
 
−
|}
 
−
 
 
−
=== TSMC  ===
 
−
{| class="wikitable"
 
−
|-
 
−
| || Measurement || Scaling from [[16 nm]]
 
−
|-
 
−
| Fin Pitch || ? nm || ?x
 
−
|-
 
−
| Contacted Gate Pitch || 70 nm || 0.78x
 
−
|-
 
−
| Interconnect Pitch (M1P) || 46 nm || 0.72x
 
−
|-
 
−
| [[SRAM]] bit cell || ? µm<sup>2</sup> || ?x
 
−
|}
 
  
 
== 10 nm Microprocessors==
 
== 10 nm Microprocessors==

Revision as of 01:19, 24 April 2016

basic wafer drawing.svg Semiconductor lithography processes technology
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The 10 nm lithography process is a full node semiconductor manufacturing process following the 14 nm process stopgap. Commercial integrated circuit manufacturing using 10 nm process is set to begin in 2017. This technology is set to be replaced by 7 nm process 2019.

Industry

Fab
 ​
Fin Pitch​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HP)​
SRAM bit cell (HD)
Intel Samsung TSMC
Value 14 nm Δ Value 14 nm Δ Value 16 nm Δ
 ? nm  ?x  ? nm  ?x  ? nm  ?x
55 nm 0.78x 64 nm 0.82x 70 nm 0.78x
38 nm 0.74x 48 nm 0.75x 46 nm 0.72x
 ? µm2  ?x 0.049 µm2 0.61x  ? µm2  ?x
 ? µm2  ?x 0.040 µm2 0.63x  ? µm2  ?x

10 nm Microprocessors

This list is incomplete; you can help by expanding it.

10 nm System on Chips

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10 nm Microarchitectures

This list is incomplete; you can help by expanding it.

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