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Difference between revisions of "10 nm lithography process"

(Industry)
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| ? nm || ?x || ? nm || ?x || ? nm || ?x
 
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|  54 nm || 0.77x || 64 nm || 0.82x || 70 nm || 0.78x
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|  54 nm || 0.77x || ? nm || ?x || ? nm || ?x
 
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| 38 nm || 0.74x || 48 nm || 0.75x || 46 nm || 0.72x
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| ? µm<sup>2</sup> || ?x || 0.049 µm<sup>2</sup> || 0.61x || ? µm<sup>2</sup> || ?x
 
| ? µm<sup>2</sup> || ?x || 0.049 µm<sup>2</sup> || 0.61x || ? µm<sup>2</sup> || ?x

Revision as of 16:42, 5 September 2016

The 10 nanometer (10 nm) lithography process is a full node semiconductor manufacturing process following the 14 nm process stopgap. The term "10 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. Commercial integrated circuit manufacturing using 10 nm process is set to begin in 2017. This technology is set to be replaced by 7 nm process 2019.

Industry

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.


Fab
Process Name​
1st Production​
 ​
Fin Pitch​
Fin Width​
Fin Height​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HP)​
SRAM bit cell (HD)
Intel Samsung TSMC
P1274
2017 2017
Value 14 nm Δ Value 14 nm Δ Value 16 nm Δ
 ? nm  ?x  ? nm  ?x  ? nm  ?x
 ? nm  ?x  ? nm  ?x  ? nm  ?x
 ? nm  ?x  ? nm  ?x  ? nm  ?x
54 nm 0.77x  ? nm  ?x  ? nm  ?x
 ? nm  ?x  ? nm  ?x  ? nm  ?x
 ? µm2  ?x 0.049 µm2 0.61x  ? µm2  ?x
 ? µm2  ?x 0.040 µm2 0.63x  ? µm2  ?x

10 nm Microprocessors

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10 nm System on Chips

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10 nm Microarchitectures

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