Revision as of 17:08, 10 March 2017

Semiconductor lithography processes technology

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The 16 nanometer (16 nm) lithography process is a full node semiconductor manufacturing process following the 20 nm process stopgap. Commercial integrated circuit manufacturing using 16 nm process began in 2014. The term "16 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. This technology is set to be replaced with 10 nm process in 2017.

Industry

TSMC

TSMC demonstrated their 256 Mebibit SRAM wafer from their 7nm HKMG FinFET process. Their chip makes use of 34% of the area of their 16 nm process demo chip counterpart.

TSMC 256Mb SRAM demo wafer[2]
Technology 16 nm HK-MG FinFET Metal scheme 1P7M Supply voltage 0.85 V (core) 1.8 V (i/o) Bit cell size 0.07 µm² macro configs 4096x32 MUX16 258 bits/BL 272 bits/WL Capacity 256 Mib Test Features Row/Column Redundancy Programmable E-fuse Die Size 42.6 mm²

16 nm Microprocessors

• PEZY
  • PEZY-SC2
• MediaTek
  • Helio

This list is incomplete; you can help by expanding it.

16 nm Microarchitectures

This list is incomplete; you can help by expanding it.

References