From WikiChip
PEZY-SC2 - PEZY
< pezy

PEZY-SC2
Designer PEZY
Manufacturer TSMC
Model Number PEZY-SC2
Market Industrial
Introduction 2015 (announced)
2016 (launch)
General information
Frequency
1 GHz
999,990 kHz
999.99 MHz
Bus speed
0.0667 GHz
66,660 kHz
66.66 MHz
Clock multiplier 15
Microarchitecture
Process 16 nm
0.016 μm
1.6e-5 mm
Technology CMOS
Die size 400-500 mm²
"-500mm²" is not declared as a valid unit of measurement for this property.
Core count 4,096
Electrical
Power dissipation 100 W
100,000 mW
0.134 hp
0.1 kW

PEZY-SC2 (PEZY Super Computer 2) is third generation many-core microprocessor developed by PEZY set to be released in late 2016 or early 2017. The SC2 is planned to have 4096 cores, 4 times as many cores as its predecessor. Unlike the PEZY-SC which had 2 ARM926, the SC2 will be replaced by 12 MIPS64 cores.

PEZY-SC2 is planned to operate at 1 GHz and consume around 100 W while delivering performance in the order of 16.4 TFLOPS (single-precision) and 8.2 TFLOPS (double precision). The PEZY-SC2 is designed using over 2.4 billion gates and will be manufactured on TSMC's 16 nm process.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.
Facts about "PEZY-SC2 - PEZY"
base frequency999.99 MHz (1 GHz, 999,990 kHz) +
bus speed66.66 MHz (0.0667 GHz, 66,660 kHz) +
clock multiplier15 +
core count4,096 +
designerPEZY +
first announced2015 +
first launched2016 +
full page namepezy/pezy-sc2 +
instance ofmicroprocessor +
ldate3000 +
manufacturerTSMC +
market segmentIndustrial +
model numberPEZY-SC2 +
namePEZY-SC2 +
power dissipation100 W (100,000 mW, 0.134 hp, 0.1 kW) +
process16 nm (0.016 μm, 1.6e-5 mm) +
technologyCMOS +