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Difference between revisions of "130 nm lithography process"
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Revision as of 20:10, 23 April 2016
The 130 nm lithography process is a full node semiconductor manufacturing process following the 150 nm process stopgap. Commercial integrated circuit manufacturing using 130 nm process began in 2001. This technology was replaced by with 110 nm process (HN) in 2003 and 90 nm process (FN) in 2004.
Contents
Industry
Intel
- 200mm (8-inch) wafers
Measurement | Scaling from 180 nm | |
Contacted Gate Pitch | 319 nm | 0.66x |
Interconnect Pitch (M1P) | 345 nm | 0.69x |
SRAM bit cell | 2.0 µm2 | 0.36x |
Design Rules | |||
---|---|---|---|
Layer | Pitch | Thick | Aspect Ratio |
Isolation | 345 nm | 450 nm | - |
Polysilicon | 319 nm | 160 nm | - |
Metal 1 | 293 nm | 280 nm | 1.7 |
Metal 2 | 425 nm | 360 nm | 1.7 |
Metal 3 | 425 nm | 360 nm | 1.7 |
Metal 4 | 718 nm | 570 nm | 1.6 |
Metal 5 | 1.064 µm | 900 nm | 1.7 |
Metal 6 | 1.143 µm | 1.2 µm | 2.1 |
130 nm Microprocessors
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130 nm System on Chips
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130 nm Microarchitectures
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