Difference between revisions of "90 nm lithography process"

Latest revision as of 21:27, 19 March 2025

Semiconductor lithography processes technology

1 nm • 18A
2 nm • 3 nm
5 nm • 7 nm
10 nm • 12 nm
14 nm • 16 nm
20 nm • 22 nm
28 nm • 32 nm
40 nm • 45 nm
55 nm • 65 nm
80 nm • 90 nm
110 nm • 130 nm
150 nm • 180 nm
220 nm • 240 nm
250 nm • 280 nm
350 nm • 500 nm
600 nm • 650 nm
700 nm • 750 nm
800 nm
1 µm • 1.2 µm
1.3 µm • 1.5 µm
2 µm • 2.5 µm
3 µm • 3.5 µm
5 µm • 6 µm
7 µm • 8 µm
10 µm • 16 µm
20 µm • 50 µm

The 90 nanometer (90 nm) lithography process is a full node semiconductor manufacturing process following the 110 nm process stopgap.

Commercial integrated circuit manufacturing using 90 nm process began in 2003.

This technology was superseded by the 80 nm (HN) / 65 nm process (FN) in 2006.

Industry[edit]

Introduced in late 2002, Intel's 90 nm process became the first volume production to introduce strained silicon transistors.

Specifications[edit]

Fab / Manuf
Process Name
1st Production
Type
Wafer
Metal Layers

Contacted Gate Pitch
Interconnect Pitch (M1P)
SRAM bit cell
DRAM bit cell

Intel		TSMC		Samsung		Fujitsu		IBM / Toshiba / Sony / AMD		Motorola		TI
P1262						CS-100 / CS-101				HiPerMOS 8
2002		2003		2003		2004		2003		2004		2005
Bulk								PDSOI				Bulk
300mm
7						10						9
Value	130 nm Δ	Value	130 nm Δ	Value	130 nm Δ	Value	130 nm Δ	Value	130 nm Δ	Value	130 nm Δ	Value	130 nm Δ
260 nm	0.82x	240 nm	0.77x	245 nm	0.70x	? nm	?x	? nm	?x	? nm	?x	? nm	?x .
220 nm	0.63x	240 nm	0.71x	245 nm	0.70x	? nm	?x	? nm	?x	? nm	?x	? nm	?x .
1.0 µm²	0.50x	0.999 µm²	0.47x	0.999 µm²	?x	1.07 µm²	0.54x	0.999 µm²	?x	? µm²	?x	? µm²	?x
				0.275 µm²				0.19 µm²	?x

90 nm Microprocessors[edit]

AMD
- Athlon 64
- Athlon 64 X2
- FX
- Opteron
- Turion 64
- Turion 64 X2
Cavium
- OCTEON Plus
HAL (Fujitsu)
- SPARC64 V
IBM
- PowerPC 970
Loongson
- Godson 2
Qualcomm
- MSM6xxx
Sun
- UltraSPARC T1
Intel
STMicroelectronics
- STM32 F4
- STM32 F7
- STM32 G0
- STM32 G4

This list is incomplete; you can help by expanding it.

90 nm Microarchitectures[edit]

AMD
- K8
ARM
- ARM7
IBM
- z9
Intel
- Pentium M
VIA Technologies
- Esther

This list is incomplete; you can help by expanding it.

Documents[edit]

Samsung foundry - 45 nm, 65 nm, 90 nm guide (August, 2007)

@@ Line 1: / Line 1: @@
 {{lithography processes}}
-The '''90 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[110 nm lithography process|110 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 90 nm process began in 2004. This technology was superseded by the [[80 nm lithography process|80 nm process]] (HN) / [[65 nm lithography process|65 nm process]] (FN) in 2006.
+The '''90 nanometer ([[90 nm]]) lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[110 nm lithography process|110 nm process]] stopgap.
+:Commercial [[integrated circuit]] manufacturing using [[90 nm]] process began in [[2003]].
+This technology was superseded by the [[80 nm lithography process|80 nm]] (HN) / [[65 nm lithography process|65 nm process]] (FN) in [[2006]].
 == Industry ==
-{{scrolling table/top|style=text-align: right; | first=Fab
+[[File:45nm SRAM photo.JPG|left|400px]]
+Introduced in late [[2002]], [[Intel]]'s [[90 nm]] process became the first volume production to introduce [[strained silicon]] transistors.
+{{clear}}
+=== Specifications ===
+{{scrolling table/top|style=text-align: right; | first=Fab /<br>Manuf
   |Process Name
   |1st Production
   |Type
+ |Wafer
+ |Metal Layers
   |&nbsp;
-  |Contacted Gate Pitch
+  |Contacted <br>Gate Pitch
-  |Interconnect Pitch (M1P)
+  |Interconnect <br>Pitch (M1P)
-  |SRAM bit cell
+  |SRAM <br>bit cell
+ |DRAM <br>bit cell
 }}
 {{scrolling table/mid}}
 |-
-! colspan="2" | [[Intel]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[Samsung]] !! colspan="2" | [[Fujitsu]] || colspan="2" | [[IBM]] / [[Toshiba]] / [[Sony]] / [[AMD]] / [[Chartered]]
+! colspan="2" | [[Intel]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[Samsung]] !! colspan="2" | [[Fujitsu]] || colspan="2" | [[IBM]] / [[Toshiba]] / <br>[[Sony]] / [[AMD]] <!--/ [[Chartered]]--> !! colspan="2" | [[Motorola]] !! colspan="2" | [[TI]]
 |- style="text-align: center;"
-| colspan="2" | P1262 || colspan="2" |  || colspan="2" |  || colspan="2" | CS-100 / CS-101 || colspan="2" |
+| colspan="2" | P1262 || colspan="2" |  || colspan="2" |  || colspan="2" | CS-100 / CS-101 || colspan="2" |   || colspan="2" |  HiPerMOS 8 || colspan="2" |
 |- style="text-align: center;"
-| colspan="2" | 2002 || colspan="2" | 2003 || colspan="2" | 2003 || colspan="2" | 2004 || colspan="2" | 2003
+| colspan="2" | 2002 || colspan="2" | 2003 || colspan="2" | 2003 || colspan="2" | 2004 || colspan="2" | 2003 || colspan="2" | 2004 || colspan="2" | 2005
 |- style="text-align: center;"
-| colspan="8" | Bulk || colspan="2" | PDSOI
+| colspan="8" | Bulk || colspan="4" | PDSOI || colspan="2" | Bulk
+|- style="text-align: center;"
+| colspan="14" | 300mm
+|- style="text-align: center;"
+| colspan="2" | 7 || colspan="2" |  || colspan="2" |  || colspan="2" | 10 || colspan="2" |  || colspan="2" | || colspan="2" | 9
 |-
-! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ
+! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ !! Value !! [[130 nm]] Δ
 |-
-| 260 nm || 0.82x || 240 nm || 0.77x || 245 nm || 0.70x || ? nm || ?x || ? nm || ?x
+| 260 nm || 0.82x || 240 nm || 0.77x || 245 nm || 0.70x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x <br>.
 |-
-| 220 nm || 0.63x || 240 nm || 0.71x || 245 nm || 0.70x || ? nm || ?x || ? nm || ?x
+| 220 nm || 0.63x || 240 nm || 0.71x || 245 nm || 0.70x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x <br>.
 |-
-| 1.0 µm<sup>2</sup> || 0.50x || 0.999 µm<sup>2</sup> || ?x ||  0.999 µm<sup>2</sup> || ?x || 1.07 µm<sup>2</sup> || 0.54x || 0.999 µm<sup>2</sup> || ?x
+| 1.0 µm² || 0.50x || 0.999 <br>µm² || 0.47x ||  0.999 <br>µm² || ?x || 1.07 µm² || 0.54x || 0.999 <br>µm² || ?x || ? µm² || ?x || ? µm² || ?x
+|-
+| || ||  || || 0.275 <br>µm² || || || || 0.19 µm² || ?x || || || ||
 {{scrolling table/end}}
 == 90 nm Microprocessors==
+* [[AMD]]
+** {{amd|Athlon 64}}
+** {{amd|Athlon 64 X2}}
+** {{amd|FX}}
+** {{amd|Opteron}}
+** {{amd|Turion 64}}
+** {{amd|Turion 64 X2}}
+* [[Cavium]]
+** {{cavium|OCTEON Plus}}
+* HAL ([[Fujitsu]])
+** {{hal|SPARC64 V}}
+* [[IBM]]
+** {{ibm|PowerPC 970}}
+* Loongson
+** {{loongson|Godson 2}}
+* [[Qualcomm]]
+** {{qualcomm|MSM6xxx}}
+* Sun
+** {{sun|UltraSPARC T1}}
+* [[Intel]]
+** {{intel|Pentium 4 Extreme Edition}}
+** {{intel|Pentium M}}
+** {{intel|Pentium D}}
+** {{intel|EP80579}}
+* [[STMicro]]electronics
+** STM32 F4
+** STM32 F7
+** STM32 G0
+** STM32 G4
 {{expand list}}
-== 90 nm System on Chips==
+== 90 nm Microarchitectures ==
+* [[AMD]]
+** {{amd|K8|l=arch}}
+* [[ARM]]
+** {{armh|ARM7|l=arch}}
+* [[IBM]]
+** {{ibm|z9|l=arch}}
+* [[Intel]]
+** {{intel|Pentium M|l=arch}}
+* VIA Technologies
+** {{via|Esther|l=arch}}
 {{expand list}}
-== 90 nm Microarchitectures ==
+== Documents ==
-{{expand list}}
+* [[:File:samsung foundry - 45, 65, 90 (August, 2007).pdf|Samsung foundry - 45 nm, 65 nm, 90 nm guide (August, 2007)]]
+[[category:lithography]]

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