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Difference between revisions of "28 nm lithography process"

(Industry)
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! colspan="2" | [[Samsung]] !! colspan="2" | [[TSMC]]
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! colspan="2" | [[Samsung]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[GlobalFoundries]]
 
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! Value !! [[40 nm]] Δ !! Value !! [[40 nm]] Δ
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! Value !! [[40 nm]] Δ !! Value !! [[40 nm]] Δ !! Value !! [[40 nm]] Δ
 
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| 90 nm || 0.70x || 117 nm || 0.72x
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| 90 nm || 0.70x || 117 nm || 0.72x || ?nm || ?x
 
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| 96 nm || 0.82x || ?nm || ?x
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| 96 nm || 0.82x || ?nm || ?x || ?nm || ?x
 
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| 0.120 µm<sup>2</sup> || ?x || 0.127 µm<sup>2</sup> || 0.52x
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| 0.120 µm<sup>2</sup> || ?x || 0.127 µm<sup>2</sup> || 0.52x || 0.120 µm<sup>2</sup> || ?x
 
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|  || || 0.155 µm<sup>2</sup> ||  
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|  || || 0.155 µm<sup>2</sup> || || ||
 
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Revision as of 21:33, 25 April 2016

The 28 nm lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 32 nm and 22 nm processes. Commercial integrated circuit manufacturing using 28 nm process began in 2011. This technology superseded by commercial 22 nm process.

Industry

Fab
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HD)​
SRAM bit cell (LP)
Samsung TSMC GlobalFoundries
Value 40 nm Δ Value 40 nm Δ Value 40 nm Δ
90 nm 0.70x 117 nm 0.72x  ?nm  ?x
96 nm 0.82x  ?nm  ?x  ?nm  ?x
0.120 µm2  ?x 0.127 µm2 0.52x 0.120 µm2  ?x
0.155 µm2

28 nm Microprocessors

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28 nm System on Chips

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