28 nm lithography process

Semiconductor lithography processes technology

1 nm • 18A
2 nm • 3 nm
5 nm • 7 nm
10 nm • 12 nm
14 nm • 16 nm
20 nm • 22 nm
28 nm • 32 nm
40 nm • 45 nm
55 nm • 65 nm
80 nm • 90 nm
110 nm • 130 nm
150 nm • 180 nm
220 nm • 240 nm
250 nm • 280 nm
350 nm • 500 nm
600 nm • 650 nm
700 nm • 750 nm
800 nm
1 µm • 1.2 µm
1.3 µm • 1.5 µm
2 µm • 2.5 µm
3 µm • 3.5 µm
5 µm • 6 µm
7 µm • 8 µm
10 µm • 16 µm
20 µm • 50 µm

The 28 nanometer (28 nm) lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 32 nm and 22 nm processes. Commercial integrated circuit manufacturing using 28 nm process began in 2011. This technology superseded by commercial 22 nm process.

Industry


Process Name
1st Production
Litho- graphy	Lithography
	Immersion
	Exposure
Wafer	Type
Wafer	Size
Tran- sistor	Type
Tran- sistor	Voltage
Metal Layers

Gate Length (L_g)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcell	High-Perf (HP)
	High-Density (HD)
	Low-Voltage (LV)
DRAM bitcell	eDRAM

 TSMC
 Common Platform Alliance The 'Common Platform Alliance  is a joint collaboration between IBM, Samsung, GlobalFoundries, Toshiba, NEC, STMicroelectronics, Infineon Technologies, Chartered Semiconductor Manufacturing

 28LP/28LPP/28SLP

 2

 Bulk
 Bulk

 300 mm
 300 mm

 Planar
 Planar

 1 V

 10
  
 Value 
 32 nm Δ
 Value 
 32 nm Δ

 113.4 nm 
  
 90 nm 
  
 0.152 µm² 
  
 0.120 µm² 
  
 0.197 µm²

28 nm Microprocessors

AMD
- A8
- A10
Intel (Fab'ed by TSMC)
- Atom x3
MediaTek
- Helio
Phytium
- FT-1500A
PEZY
- PEZY-SC
- PEZY-SCnp
Xiaomi
- Surge

This list is incomplete; you can help by expanding it.

28 nm Microarchitectures

AMD
- Steamroller
- Excavator
ARM Holdings
- Cortex-A53
Phytium
- Xiaomi

This list is incomplete; you can help by expanding it.

References

Wu, Shien-Yang, et al. "A highly manufacturable 28nm cmos low power platform technology with fully functional 64mb sram using dual/tripe gate oxide process." VLSI Technology, 2009 Symposium on. IEEE, 2009.
Shang, Huiling, et al. "High performance bulk planar 20nm CMOS technology for low power mobile applications." VLSI Technology (VLSIT), 2012 Symposium on. IEEE, 2012.
James, Dick. "High-k/metal gates in the 2010s." Advanced Semiconductor Manufacturing Conference (ASMC), 2014 25th Annual SEMI. IEEE, 2014.
Samsung foundry solution for 32 & 28 nm

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Contents

Industry

28 nm Microprocessors

28 nm Microarchitectures

References

TSMC		Common Platform Alliance The 'Common Platform Alliance is a joint collaboration between IBM, Samsung, GlobalFoundries, Toshiba, NEC, STMicroelectronics, Infineon Technologies, Chartered Semiconductor Manufacturing
		28LP/28LPP/28SLP
		2



Bulk		Bulk
300 mm		300 mm
Planar		Planar
		1 V
10
Value	32 nm Δ	Value	32 nm Δ

		113.4 nm
		90 nm
		0.152 µm²
		0.120 µm²
		0.197 µm²