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350 nm lithography process
Revision as of 21:49, 18 May 2016 by ChipIt (talk | contribs) (350 nm Microprocessors)

The 350 nm lithography process is a full node semiconductor manufacturing process following the 500 nm process node. Commercial integrated circuit manufacturing using 350 nm process began in late 1995. 350 nm was phased out and replaced by 250 nm in 1999.

Industry

Fab
Process Name​
1st Production​
Metal Layers​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Intel IBM AMD DEC Fujitsu IDT NEC TI Motorola Hitachi
P854 CS-34 CMOS-6 CS-60 HiPerMOS 2
1994 1994 1995 1995 1996 1996 1995 1997 1996
4 5 5 6 5 3 4 5
Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ Value 500 nm Δ
550 nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x
880 nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x  ? nm  ?x
18.1 µm2 0.41x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x  ? µm2  ?x 21.67 µm2  ?x

Design Rules

350 nm Microprocessors

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350 nm Microarchitectures

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