The 10 µm lithography process was the semiconductor process technology used by the major semiconductor companies during the years of 1967 and 1973. This process had an effective channel length of roughly 10 µm between the source and drain (Poly-SI channel implant). The typical wafer size for this process at companies such as Fairchild and TI was 2-inch (51 mm).

Industry

Fab
Process Name​
1st Production​
Contacted Gate Pitch​
Interconnect Pitch​
Metal Layers​
Technology​
Wafer

Intel	TI	RCA	Fairchild	National	MIL
1970	1969	1969			1969
? nm	? nm	? nm	? nm	? nm	? nm
? nm	? nm	? nm	? nm	? nm	? nm
2	2	2	2
PMOS	PMOS	CMOS	PMOS	PMOS
51 mm

10 µm Microprocessors

• Intel
  • 4004
  • 4040
  • 8008
• National
  • IMP-4

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10 µm Chips

• Intel
  • 3000
• RCA
  • CD4000 Series

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