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Difference between revisions of "1.2 µm lithography process"
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** {{qualcomm|MSM}} (prototype) | ** {{qualcomm|MSM}} (prototype) | ||
{{expand list}} | {{expand list}} | ||
+ | |||
+ | == References == | ||
+ | * Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984. | ||
[[Category:Lithography]] | [[Category:Lithography]] |
Revision as of 04:38, 4 April 2017
Semiconductor lithography processes technology |
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The 1.2 µm lithography process was the semiconductor process technology used by the major semiconductor companies between in the late 1980s. 1 µm was phased out in the early 1990s and was replaced by 1 µm, 800 nm, and 650 nm processes.
Industry
Fab |
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Process Name |
1st Production |
|
Contacted Gate Pitch |
Interconnect Pitch (M1P) |
SRAM bit cell |
1.2 µm Microprocessors
This list is incomplete; you can help by expanding it.
References
- Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.