Revision as of 03:54, 24 May 2016

Semiconductor lithography processes technology

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The 250 nanometer (250 nm) lithography process is a full node semiconductor manufacturing process following the 350 nm process node. Commercial integrated circuit manufacturing using 250 nm process began in 1997 and was eventually replaced by 180 nm by 1999.

Industry

The 0.25 µm-based process entered production at Intel in 1997. Intel original 0.25 micron process was named P856 or Process 856. A second process, named P856.5, was a 5% linear shrink of the original design rules. The shrink, which enabled a high equipment re-use resulted in a smaller, 9.26 µm², 6T SRAM. The process used 200 mm wafers, SiO₂ dielectric and polysilicon electode. It used Al inter-connects and an Si channels.

Design Rules

250 nm Microprocessors

• Intel
  • Pentium MMX, 200-300 MHz September, 1997
  • Pentium II, 333-450 MHz, January 1998
  • Mobile Pentium II, 233-300 MHz, April 1998
  • Pentium II Xeon
  • Celeron, 200-300 MHz, April 1998
  • Celeron, 300-533 MHz, August 1998
  • Celeron Notebook, 266-466 MHz, January 1999
  • Pentium III, 450-600 MHz, February 1999
  • Pentium III Xeon
• MIPS
  • R10000, 1997, fab'ed by NEC
• AMD
  • K6
  • K6-2
  • K6-III
• IBM
  • Power2
  • Power3
  • PowerPC 630
  • PowerPC 604ev
• DEC
  • Alpha 21264A
• Sun
  • UltraSPARC II
  • UltraSPARC IIi

This list is incomplete; you can help by expanding it.

250 nm Microarchitectures

• Intel
  • P6

This list is incomplete; you can help by expanding it.