Semiconductor & Computer Engineering
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Difference between revisions of "350 nm lithography process"
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| − | ! colspan="2" | [[Intel]] || colspan="2" | [[IBM]] | + | ! colspan="2" | [[Intel]] || colspan="2" | [[IBM]] || colspan="2" | [[AMD]] || colspan="2" | [[DEC]] || colspan="2" | [[Fujitsu]] || colspan="2" | [[IDT]] || colspan="2" | [[NEC]] || colspan="2" | [[TI]] |
|- style="text-align: center;" | |- style="text-align: center;" | ||
| − | | colspan="2" | P854 || colspan="2" | | + | | colspan="2" | P854 || colspan="2" | || colspan="2" | || colspan="2" | CMOS-6 || colspan="2" | CS-60 || colspan="2" | || colspan="2" | || colspan="2" | |
|- style="text-align: center;" | |- style="text-align: center;" | ||
| − | | colspan="2" | 1994 || colspan="2" | 1994 | + | | colspan="2" | 1994 || colspan="2" | 1994 || colspan="2" | 1997 || colspan="2" | 1995 || colspan="2" | 1996 || colspan="2" | 1996 || colspan="2" | 1995 || colspan="2" | 1997 |
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| − | ! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ | + | ! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ !! Value !! [[500 nm]] Δ |
|- | |- | ||
| − | | 550 nm || ?x || ? nm || ?x | + | | 550 nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x |
|- | |- | ||
| − | | 880 nm || ?x || ? nm || ?x | + | | 880 nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x |
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| − | | 18.1 µm<sup>2</sup> || 0.41x || ? µm<sup>2</sup> || ?x | + | | 18.1 µm<sup>2</sup> || 0.41x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x |
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=== Design Rules === | === Design Rules === | ||
Revision as of 22:50, 26 April 2016
Semiconductor lithography processes technology
The 350 nm lithography process is a full node semiconductor manufacturing process following the 500 nm process node. Commercial integrated circuit manufacturing using 350 nm process began in late 1995. 350 nm was phased out and replaced by 250 nm in 1999.
Industry
| Fab |
|---|
| Process Name |
| 1st Production |
| |
| Contacted Gate Pitch |
| Interconnect Pitch (M1P) |
| SRAM bit cell |
| Intel | IBM | AMD | DEC | Fujitsu | IDT | NEC | TI | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| P854 | CMOS-6 | CS-60 | |||||||||||||
| 1994 | 1994 | 1997 | 1995 | 1996 | 1996 | 1995 | 1997 | ||||||||
| Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ | Value | 500 nm Δ |
| 550 nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
| 880 nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
| 18.1 µm2 | 0.41x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x |
Design Rules
| Intel 0.350 micron Design Rules | ||
|---|---|---|
| Layer | Pitch | Thick |
| Isolation | ? nm | ? nm |
| Polysilicon | ? nm | ? nm |
| Metal 1 | 880 nm | 600 nm |
| Metal 2 | 1.16 µm | 800 nm |
| Metal 3 | 1.16 µm | 800 nm |
| Metal 4 | 1.70 µm | 1.70 µm |
350 nm Microprocessors
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350 nm Microarchitectures
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