From WikiChip
Difference between revisions of "6 µm lithography process"
Line 14: | Line 14: | ||
{{scrolling table/mid}} | {{scrolling table/mid}} | ||
|- | |- | ||
− | ! [[Intel]] !! [[Motorola]] !! [[AMI]] | + | ! [[Intel]] !! [[Motorola]] !! [[AMI]] !! [[AMD]] |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | || || | + | | || || || |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | 1971 || 1971 || | + | | 1971 || 1971 || || |
|- | |- | ||
− | | ? nm || ? nm || ? nm | + | | ? nm || ? nm || ? nm || ? nm |
|- | |- | ||
− | | ? nm || ? nm || ? nm | + | | ? nm || ? nm || ? nm || ? nm |
|- | |- | ||
− | | 2 || 2 || | + | | 2 || 2 || || |
|- | |- | ||
− | | nMOS || depletion-mode nMOS || nMOS/pMOS/CMOS | + | | nMOS || depletion-mode nMOS || nMOS/pMOS/CMOS || |
|- | |- | ||
− | | 3" || || | + | | 3" || || || |
{{scrolling table/end}} | {{scrolling table/end}} | ||
Line 38: | Line 38: | ||
* AMI | * AMI | ||
** {{ami|S9900P}} | ** {{ami|S9900P}} | ||
+ | * AMD | ||
+ | ** {{amd|Am9080}} | ||
{{expand list}} | {{expand list}} | ||
Revision as of 11:25, 26 April 2016
The 6μm lithography process was the semiconductor process technology used by some semiconductor companies during the early to mid 1970s. This process was later superseded by 5 µm, 3 µm, and 2 µm processes.
Industry
Fab |
---|
Process Name |
1st Production |
Contacted Gate Pitch |
Interconnect Pitch |
Metal Layers |
Technology |
Wafer |
Intel | Motorola | AMI | AMD |
---|---|---|---|
1971 | 1971 | ||
? nm | ? nm | ? nm | ? nm |
? nm | ? nm | ? nm | ? nm |
2 | 2 | ||
nMOS | depletion-mode nMOS | nMOS/pMOS/CMOS | |
3" |
Microprocessors
This list is incomplete; you can help by expanding it.
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |