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Difference between revisions of "2 µm lithography process"
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− | ! [[Toshiba]] || [[STMicro]] || [[Motorola]] || [[TI]] || [[AMD]] | + | ! [[Intel]] || [[Intel]] || [[Toshiba]] || [[STMicro]] || [[Motorola]] || [[TI]] || [[AMD]] |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | | + | | P414.1 (HMOS-II) || P421.X (HMOS-E) || || BCD-Offline || || || |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | 1986 || 1992 || || || | + | | 1980 || 1980 || 1986 || 1992 || || || |
|- | |- | ||
− | | ? nm | + | | ? nm || ? nm || ? nm || ? nm || ? nm || ? nm || ? nm |
|- | |- | ||
− | | ? nm | + | | ? nm || ? nm || ? nm || ? nm || ? nm || ? nm || ? nm |
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− | | ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || | + | | ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> || ? µm<sup>2</sup> |
{{scrolling table/end}} | {{scrolling table/end}} | ||
Revision as of 16:42, 4 June 2016
The 2 µm lithography process was the semiconductor process technology used by the some semiconductor companies in the mid to late 1980s. By the mid 80s this process was replaced by 1.5 µm, 1.3 µm, and 1.2 µm processes.
Industry
Fab |
---|
Process Name |
1st Production |
Contacted Gate Pitch |
Interconnect Pitch (M1P) |
SRAM bit cell |
Intel | Intel | Toshiba | STMicro | Motorola | TI | AMD |
---|---|---|---|---|---|---|
P414.1 (HMOS-II) | P421.X (HMOS-E) | BCD-Offline | ||||
1980 | 1980 | 1986 | 1992 | |||
? nm | ? nm | ? nm | ? nm | ? nm | ? nm | ? nm |
? nm | ? nm | ? nm | ? nm | ? nm | ? nm | ? nm |
? µm2 | ? µm2 | ? µm2 | ? µm2 | ? µm2 | ? µm2 | ? µm2 |
Microprocessors
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