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Difference between revisions of "6 µm lithography process"
(→Industry) |
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Line 26: | Line 26: | ||
| 2 || 2 || || | | 2 || 2 || || | ||
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− | | nMOS || depletion-mode nMOS || nMOS/pMOS/CMOS || | + | | nMOS/pMOS || depletion-mode nMOS || nMOS/pMOS/CMOS || |
|- | |- | ||
| 3" || || || | | 3" || || || |
Revision as of 21:41, 26 April 2016
Semiconductor lithography processes technology |
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The 6μm lithography process was the semiconductor process technology used by some semiconductor companies during the early to mid 1970s. This process was later superseded by 5 µm, 3 µm, and 2 µm processes.
Industry
Fab |
---|
Process Name |
1st Production |
Contacted Gate Pitch |
Interconnect Pitch |
Metal Layers |
Technology |
Wafer |
Intel | Motorola | AMI | AMD |
---|---|---|---|
1971 | 1971 | ||
? nm | ? nm | ? nm | ? nm |
? nm | ? nm | ? nm | ? nm |
2 | 2 | ||
nMOS/pMOS | depletion-mode nMOS | nMOS/pMOS/CMOS | |
3" |
6μm Microprocessors
This list is incomplete; you can help by expanding it.
6μm Chips
- Intel
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |