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Difference between revisions of "350 nm lithography process"

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== Industry ==
 
== Industry ==
 
{{scrolling table/top|style=text-align: right; | first=Fab
 
{{scrolling table/top|style=text-align: right; | first=Fab
 +
|Process Name
 +
|1st Production
 
  | 
 
  | 
 
  |Contacted Gate Pitch
 
  |Contacted Gate Pitch
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{{scrolling table/mid}}
 
{{scrolling table/mid}}
 
|-
 
|-
! colspan="2" | [[Intel]]
+
! [[Intel]] || [[IBM]]
 +
|- style="text-align: center;"
 +
| P854 ||
 +
|- style="text-align: center;"
 +
| 1994 || 1994
 
|-
 
|-
! Value
+
! Value !! Value
 
|-
 
|-
| 550 nm
+
| 550 nm || ? nm
 
|-
 
|-
| 880 nm
+
| 880 nm || ? nm
 
|-
 
|-
| 18.1 µm<sup>2</sup>
+
| 18.1 µm<sup>2</sup> || ? µm<sup>2</sup>
 
{{scrolling table/end}}
 
{{scrolling table/end}}
 
=== Design Rules ===
 
=== Design Rules ===

Revision as of 18:34, 24 April 2016

The 350 nm lithography process is a full node semiconductor manufacturing process following the 500 nm process node. Commercial integrated circuit manufacturing using 350 nm process began in late 1995. 350 nm was phased out and replaced by 250 nm in 1999.

Industry

Fab
Process Name​
1st Production​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Intel IBM
P854
1994 1994
Value Value
550 nm  ? nm
880 nm  ? nm
18.1 µm2  ? µm2

Design Rules

350 nm Microprocessors

This list is incomplete; you can help by expanding it.

350 nm Microarchitectures

This list is incomplete; you can help by expanding it.