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Difference between revisions of "3 nm lithography process"
(Created page with "{{lithography processes}} The '''3.5 nanometer (3.5 nm) lithography process''' is a full node semiconductor manufacturing process following the 5 nm lith...") |
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− | The '''3.5 nanometer (3.5 nm) lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[5 nm lithography process|5 nm process]] node. Commercial [[integrated circuit]] manufacturing using 3.5 nm process is set to begin sometimes around 2024 or 2025. The term "3.5 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to [[technology node|gate length or half pitch]]. | + | The '''3.5 nanometer (3.5 nm)''' or '''35 Å lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[5 nm lithography process|5 nm process]] node. Commercial [[integrated circuit]] manufacturing using 3.5 nm process is set to begin sometimes around 2024 or 2025. The term "3.5 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to [[technology node|gate length or half pitch]]. |
== Industry == | == Industry == |
Revision as of 15:24, 19 May 2017
The 3.5 nanometer (3.5 nm) or 35 Å lithography process is a full node semiconductor manufacturing process following the 5 nm process node. Commercial integrated circuit manufacturing using 3.5 nm process is set to begin sometimes around 2024 or 2025. The term "3.5 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch.
Industry
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3.5 nm Microprocessors
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3.5 nm Microarchitectures
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