From WikiChip
Difference between revisions of "1.2 µm lithography process"
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|Process Name | |Process Name | ||
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| − | |Gate | + | |Contacted Gate Pitch |
|Interconnect Pitch (M1P) | |Interconnect Pitch (M1P) | ||
|SRAM bit cell | |SRAM bit cell | ||
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| − | ! [[Intel]] !! [[NEC | + | ! [[Intel]] !! [[NEC]] |
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|- style="text-align: center;" | |- style="text-align: center;" | ||
| − | | 1987 || 1988 | + | | 1987 || 1988 |
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| − | + | ! Value !! Value | |
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| − | | ? | + | | ? nm || ? nm |
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| − | | ? | + | | ? nm || ? nm |
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| − | | ? | + | | ? µm<sup>2</sup> || ? µm<sup>2</sup> |
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[[Category:Lithography]] | [[Category:Lithography]] | ||
Revision as of 07:34, 7 April 2017
The 1.2 µm lithography process was the semiconductor process technology used by the major semiconductor companies between in the late 1980s. 1 µm was phased out in the early 1990s and was replaced by 1 µm, 800 nm, and 650 nm processes.
Industry
| Fab |
|---|
| Process Name |
| 1st Production |
| |
| Contacted Gate Pitch |
| Interconnect Pitch (M1P) |
| SRAM bit cell |
1.2 µm Microprocessors
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