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Difference between revisions of "16 nm lithography process"
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| colspan="2" | 300mm | | colspan="2" | 300mm | ||
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− | ! Value !! [[20 nm]] Δ | + | ! Value<ref>TechInsights/Chipworks, Kevin Gibb, The ConFab 2016</ref> !! [[20 nm]] Δ |
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| 48 nm || rowspan="3" | N/A | | 48 nm || rowspan="3" | N/A | ||
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| ? nm | | ? nm | ||
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− | | | + | | 37 nm |
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| 90 nm || 1.03x | | 90 nm || 1.03x | ||
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− | | | + | | 70 nm || 1.09x |
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| 0.07 µm<sup>2</sup> || 0.55x | | 0.07 µm<sup>2</sup> || 0.55x | ||
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== 16 nm Microarchitectures== | == 16 nm Microarchitectures== | ||
{{expand list}} | {{expand list}} | ||
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+ | == References == | ||
+ | {{reflist}} | ||
[[Category:Lithography]] | [[Category:Lithography]] |
Revision as of 20:48, 2 February 2017
The 16 nanometer (16 nm) lithography process is a full node semiconductor manufacturing process following the 20 nm process stopgap. Commercial integrated circuit manufacturing using 16 nm process began in 2014. The term "16 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. This technology is set to be replaced with 10 nm process in 2017.
Industry
Fab |
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Wafer |
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Fin Pitch |
Fin Width |
Fin Height |
Contacted Gate Pitch |
Interconnect Pitch (M1P) |
SRAM bit cell |
16 nm Microprocessors
This list is incomplete; you can help by expanding it.
16 nm Microarchitectures
This list is incomplete; you can help by expanding it.
References
- ↑ TechInsights/Chipworks, Kevin Gibb, The ConFab 2016