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From WikiChip
Difference between revisions of "20 nm lithography process"
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Revision as of 12:51, 22 November 2016
Semiconductor lithography processes technology |
|
The 20 nanometer (20 nm) lithography process is a half-node semiconductor manufacturing process used as a stopgap between the 22 nm and 16 nm processes. The term "20 nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. Commercial integrated circuit manufacturing using 20 nm process began in 2014. This technology superseded by commercial 16 nm process.
Industry
Fab |
---|
Wafer |
|
Contacted Gate Pitch |
Interconnect Pitch (M1P) |
SRAM bit cell |
Samsung | TSMC | ||
---|---|---|---|
300mm | |||
Value | 28 nm Δ | Value | 28 nm Δ |
64 nm | 0.71x | 87 nm | 0.71x |
64 nm | 0.67x | 67 nm | 0.70x |
? µm2 | ?x | 0.07 µm2 | 0.55x |
20 nm Microprocessors
This list is incomplete; you can help by expanding it.
20 nm Microarchitectures
This list is incomplete; you can help by expanding it.