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Difference between revisions of "6 µm lithography process"
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| − | ! [[Intel]] !! [[Motorola]] | + | ! [[Intel]] !! [[Motorola]] !! [[AMI]] |
|- style="text-align: center;" | |- style="text-align: center;" | ||
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|- style="text-align: center;" | |- style="text-align: center;" | ||
| − | | 1971 || 1971 | + | | 1971 || 1971 || |
|- | |- | ||
| − | | ? nm || ? nm | + | | ? nm || ? nm || ? nm |
|- | |- | ||
| − | | ? nm || ? nm | + | | ? nm || ? nm || ? nm |
|- | |- | ||
| − | | 2 || 2 | + | | 2 || 2 || |
|- | |- | ||
| − | | nMOS || depletion-mode nMOS | + | | nMOS || depletion-mode nMOS || nMOS/pMOS/CMOS |
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| − | | | + | | 3" || || |
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* Motorola | * Motorola | ||
** {{motorola|6800}} | ** {{motorola|6800}} | ||
| + | * AMI | ||
| + | ** {{ami|S9900P}} | ||
{{expand list}} | {{expand list}} | ||
Revision as of 11:12, 26 April 2016
The 6μm lithography process was the semiconductor process technology used by some semiconductor companies during the early to mid 1970s. This process was later superseded by 5 µm, 3 µm, and 2 µm processes.
Industry
| Fab |
|---|
| Process Name |
| 1st Production |
| Contacted Gate Pitch |
| Interconnect Pitch |
| Metal Layers |
| Technology |
| Wafer |
| Intel | Motorola | AMI |
|---|---|---|
| 1971 | 1971 | |
| ? nm | ? nm | ? nm |
| ? nm | ? nm | ? nm |
| 2 | 2 | |
| nMOS | depletion-mode nMOS | nMOS/pMOS/CMOS |
| 3" |
Microprocessors
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