From WikiChip
Difference between revisions of "65 nm lithography process"

(Industry)
(Industry)
Line 12: Line 12:
 
{{scrolling table/mid}}
 
{{scrolling table/mid}}
 
|-
 
|-
! colspan="2" | [[Intel]] !! colspan="2" | [[IBM]] / [[Toshiba]] / [[Sony]] / [[AMD]] !! colspan="2" | [[TI]] !! colspan="2" | [[IBM]] / [[Chartered]] / [[Infineon]] / [[Samsung]] !! colspan="2" | [[TSMC]]
+
! colspan="2" | [[Intel]] !! colspan="2" | [[IBM]] / [[Toshiba]] / [[Sony]] / [[AMD]] !! colspan="2" | [[TI]] !! colspan="2" | [[IBM]] / [[Chartered]] / [[Infineon]] / [[Samsung]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[Fujitsu]]
 
|-
 
|-
! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ
+
! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ
 
|-
 
|-
| 220 nm || 0.85x || 250 nm || ?x || ? nm || ?x || 200 nm || 0.82x || 160 nm  || 0.67x
+
| 220 nm || 0.85x || 250 nm || ?x || ? nm || ?x || 200 nm || 0.82x || 160 nm  || 0.67x || ? nm || ?x
 
|-
 
|-
| 210 nm || 0.95x || ? nm || ?x || ? nm || ?x || 180 nm  || 0.73 || 180 nm || 0.75x
+
| 210 nm || 0.95x || ? nm || ?x || ? nm || ?x || 180 nm  || 0.73 || 180 nm || 0.75x || ? nm || ?x
 
|-
 
|-
| 0.570 µm<sup>2</sup> || 0.57x || 0.65 µm<sup>2</sup> || 0.65x || 0.49 µm<sup>2</sup> || || || || ||
+
| 0.570 µm<sup>2</sup> || 0.57x || 0.65 µm<sup>2</sup> || 0.65x || 0.49 µm<sup>2</sup> || || || || || || ||
 
|-
 
|-
| 0.680 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> || || 0.490 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> || || ||
+
| 0.680 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> || || 0.490 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> || || || || ? µm<sup>2</sup> || ?x
 
{{scrolling table/end}}
 
{{scrolling table/end}}
 
=== Design Rules ===
 
=== Design Rules ===

Revision as of 03:50, 24 April 2016

The 65 nm lithography process is a full node semiconductor manufacturing process following the 80 nm process stopgap. Commercial integrated circuit manufacturing using 65 nm process began in 2006. This technology was superseded by the 55 nm process (HN) / 45 nm process (FN) in 2007.

Industry

Fab
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell (HD)​
SRAM bit cell (LP)
Intel IBM / Toshiba / Sony / AMD TI IBM / Chartered / Infineon / Samsung TSMC Fujitsu
Value 90 nm Δ Value 90 nm Δ Value 90 nm Δ Value 90 nm Δ Value 90 nm Δ Value 90 nm Δ
220 nm 0.85x 250 nm  ?x  ? nm  ?x 200 nm 0.82x 160 nm 0.67x  ? nm  ?x
210 nm 0.95x  ? nm  ?x  ? nm  ?x 180 nm 0.73 180 nm 0.75x  ? nm  ?x
0.570 µm2 0.57x 0.65 µm2 0.65x 0.49 µm2
0.680 µm2 0.540 µm2 0.490 µm2 0.540 µm2  ? µm2  ?x

Design Rules

65 nm Microprocessors

This list is incomplete; you can help by expanding it.

65 nm System on Chips

This list is incomplete; you can help by expanding it.

65 nm Microarchitectures

This list is incomplete; you can help by expanding it.