Difference between revisions of "65 nm lithography process"

Latest revision as of 22:07, 19 March 2025

Semiconductor lithography processes technology

1 nm • 18A
2 nm • 3 nm
5 nm • 7 nm
10 nm • 12 nm
14 nm • 16 nm
20 nm • 22 nm
28 nm • 32 nm
40 nm • 45 nm
55 nm • 65 nm
80 nm • 90 nm
110 nm • 130 nm
150 nm • 180 nm
220 nm • 240 nm
250 nm • 280 nm
350 nm • 500 nm
600 nm • 650 nm
700 nm • 750 nm
800 nm
1 µm • 1.2 µm
1.3 µm • 1.5 µm
2 µm • 2.5 µm
3 µm • 3.5 µm
5 µm • 6 µm
7 µm • 8 µm
10 µm • 16 µm
20 µm • 50 µm

The 65 nanometer (65 nm) lithography process is a full node semiconductor manufacturing process following the 80 nm process stopgap.

Commercial integrated circuit manufacturing using 65 nm process began in 2005.

This technology was superseded by the 55 nm process (HN) / 45 nm process (FN) in 2007.

Industry[edit]

Design Rules[edit]

Intel 65 nm Design Rules
Layer	Pitch	Thick	Aspect Ratio
Isolation	220 nm	320 nm	-
Polysilicon	220 nm	90 nm	-
Contacted Gate	220 nm		-
Metal 1	210 nm	170 nm	1.6
Metal 2	210 nm	190 nm	1.8
Metal 3	220 nm	200 nm	1.8
Metal 4	280 nm	250 nm	1.8
Metal 5	330 nm	300 nm	1.8
Metal 6	480 nm	430 nm	1.8
Metal 7	720 nm	650 nm	1.8
Metal 8	1.80 µm	975 nm	1.8

Specifications[edit]

Fab / Manuf
Process Name
1st Production
Wafer
Metal Layers

Contacted Gate Pitch
Interconnect Pitch (M1P)
SRAM bit cell (HD)
SRAM bit cell (LP)
DRAM bit cell

Intel		IBM / Toshiba / Sony / AMD		TI		IBM / Chartered / Infineon / Samsung		TSMC		Fujitsu
P1264										CS-200 / CS-201 / CS-250
2005		2005		2007		2005		2005		2006
300mm
8		10		11		10				11
Value	90 nm Δ	Value	90 nm Δ	Value	90 nm Δ	Value	90 nm Δ	Value	90 nm Δ	Value	90 nm Δ
220 nm	0.85x	250 nm	?x	? nm	?x	200 nm	0.82x	160 nm	0.67x	? nm	?x
210 nm	0.95x	? nm	?x	? nm	?x	180 nm	0.73	180 nm	0.75x	? nm	?x
0.570 µm²	0.57x	0.540 µm²		0.49 µm²		0.540 µm²	0.55x	0.499 µm²	0.50x
0.680 µm²		0.65 µm²	0.65x	0.49 µm²		0.676 µm²	0.54x	0.525 µm²	0.53x	? µm²	?x
		0.127 µm²	0.67x			0.189 µm²	0.69x

65 nm Microprocessors[edit]

This list is incomplete; you can help by expanding it.

65 nm Microarchitectures[edit]

AMD
- K8
- K10
ARM
- ARM7
IBM
- z10
Intel
- Core
Movidius
- SHAVE v2.0
VIA Technologies
- Isaiah

This list is incomplete; you can help by expanding it.

Documents[edit]

Samsung foundry - 45 nm, 65 nm, 90 nm guide (August, 2007)

@@ Line 1: / Line 1: @@
 {{lithography processes}}
-The '''65 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[80 nm lithography process|80 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 65 nm process began in 2006. This technology was superseded by the [[55 nm lithography process|55 nm process]] (HN) / [[45 nm lithography process|45 nm process]] (FN) in 2007.
+The '''65 nanometer ([[65 nm]]) lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[80 nm lithography process|80 nm process]] stopgap.
+:Commercial [[integrated circuit]] manufacturing using 65 nm process began in [[2005]].
+This technology was superseded by the [[55 nm lithography process|55 nm process]] (HN) / [[45 nm lithography process|45 nm process]] (FN) in [[2007]].
 == Industry ==
-{{scrolling table/top|style=text-align: right; | first=Fab
+[[File:45nm SRAM photo.JPG|left|400px]]
- |&nbsp;
- |Contacted Gate Pitch
- |Interconnect Pitch (M1P)
- |SRAM bit cell (HD)
- |SRAM bit cell (LP)
-}}
-{{scrolling table/mid}}
-|-
-! colspan="2" | [[Intel]] !! colspan="2" | [[IBM]] / [[Toshiba]] / [[Sony]] / [[AMD]] !! colspan="2" | [[TI]] !! colspan="2" | [[IBM]] / [[Chartered]] / [[Infineon]] / [[Samsung]]
-|-
-! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ
-|-
-| 220 nm || 0.85x || 250 nm || ?x || ? nm || ?x || 200 nm || 0.82
-|-
-| 210 nm || 0.95x || ? nm || ?x || ? nm || ?x || 180 nm  || 0.73
-|-
-| 0.570 µm<sup>2</sup> || 0.57x || 0.65 µm<sup>2</sup> || 0.65x || 0.49 µm<sup>2</sup> || || ||
-|-
-| 0.680 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> || || 0.490 µm<sup>2</sup> || || 0.540 µm<sup>2</sup> ||
-{{scrolling table/end}}
 === Design Rules ===
-{| class="wikitable collapsible collapsed"
+{| class="wikitable"
 |-
-! colspan="4" | Intel 65nm Design Rules
+! colspan="4" | [[Intel]] [[65 nm]] Design Rules
 |-
-! Layer !! Pitch !! Thick !! Aspect Ratio
+! Layer !! Pitch !! Thick !! Aspect <br>Ratio
 |-
 | Isolation || 220 nm || 320 nm || -
@@ Line 35: / Line 18: @@
 | Polysilicon || 220 nm || 90 nm || -
 |-
-| Contacted Gate ||  220 nm ||  || -
+| Contacted <br>Gate ||  220 nm ||  || -
 |-
 | Metal 1 || 210 nm || 170 nm || 1.6
@@ Line 53: / Line 36: @@
 | Metal 8 || 1.80 µm || 975 nm || 1.8
 |}
+{{clear}}
+=== Specifications ===
+{{scrolling table/top|style=text-align: right; | first=Fab /<br>Manuf
+ |Process <br>Name
+ |1st Production
+ |Wafer
+ |Metal Layers
+ |&nbsp;
+ |Contacted Gate Pitch
+ |Interconnect Pitch (M1P)
+ |SRAM bit cell (HD)
+ |SRAM bit cell (LP)
+ |DRAM bit cell
+}}
+{{scrolling table/mid}}
+|-
+! colspan="2" | [[Intel]] !! colspan="2" | [[IBM]] / [[Toshiba]] <br>/ [[Sony]] / [[AMD]] !! colspan="2" | [[TI]] !! colspan="2" | [[IBM]] / [[Chartered]] / <br>[[Infineon]] / [[Samsung]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[Fujitsu]]
+|- style="text-align: center;"
+| colspan="2" | P1264 || colspan="2" |  || colspan="2" |  || colspan="2" |  || colspan="2" |  || colspan="2" | CS-200 / CS-201<br>/ CS-250
+|- style="text-align: center;"
+| colspan="2" | 2005 || colspan="2" | 2005 || colspan="2" | 2007 || colspan="2" | 2005 || colspan="2" | 2005 || colspan="2" | 2006
+|- style="text-align: center;"
+| colspan="12" | 300mm
+|- style="text-align: center;"
+| colspan="2" | 8 || colspan="2" | 10 || colspan="2" | 11 || colspan="2" | 10 || colspan="2" | || colspan="2" | 11
+|-
+! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ !! Value !! [[90 nm]] Δ
+|-
+| 220 nm || 0.85x || 250 nm || ?x || ? nm || ?x || 200 nm || 0.82x || 160 nm  || 0.67x || ? nm || ?x
+|-
+| 210 nm || 0.95x || ? nm || ?x || ? nm || ?x || 180 nm  || 0.73 || 180 nm || 0.75x || ? nm || ?x
+|-
+| 0.570 µm² || 0.57x || 0.540 µm² ||  || 0.49 µm² || || 0.540 µm² || 0.55x || 0.499 µm² || 0.50x || ||
+|-
+| 0.680 µm² || || 0.65 µm² || 0.65x || 0.49 µm² || || 0.676 µm² || 0.54x || 0.525 µm² || 0.53x || ? µm² || ?x
+|-
+| || || 0.127 µm² || 0.67x || || || 0.189 µm² || 0.69x || || || ||
+{{scrolling table/end}}
 == 65 nm Microprocessors==
+* [[AMD]]
+** {{amd|Athlon 64 X2}}
+** {{amd|Athlon X2}}
+** {{amd|Opteron}}
+** {{amd|Phenom}}
+** {{amd|Turion 64 X2}}
+* [[Fujitsu]]
+** {{fujitsu|SPARC64 VII}}
+* [[IBM]]
+** {{ibm|Power6}}
+* [[Intel]]
+** {{intel|Celeron}}
+** {{intel|Core 2 Duo}}
+** {{intel|Core 2 Extreme}}
+** {{intel|Core 2 Quad}}
+** {{intel|Core 2 Quad Extreme}}
+** {{intel|Core Duo}}
+** {{intel|Pentium 4}}
+** {{intel|Pentium D}}
+** {{intel|Pentium Extreme Edition}}
+** {{intel|Pentium Dual-Core}}
+** {{intel|Xeon}}
+* Loongson
+** {{loongson|Godson 2}}
+* [[Qualcomm]]
+** {{qualcomm|MSM6xxx}}
+* Sun
+** {{sun|UltraSPARC T2}}
 {{expand list}}
-== 65 nm System on Chips==
+== 65 nm Microarchitectures ==
+* [[AMD]]
+** {{amd|K8|l=arch}}
+** {{amd|K10|l=arch}}
+* [[ARM]]
+** {{armh|ARM7|l=arch}}
+* [[IBM]]
+** {{ibm|z10|l=arch}}
+* [[Intel]]
+** '''{{intel|Core|l=arch}}'''
+* Movidius
+** {{movidius|SHAVE v2.0|l=arch}}
+* VIA Technologies
+** {{via|Isaiah|l=arch}}
 {{expand list}}
-== 65 nm Microarchitectures ==
+== Documents ==
-* Intel
+* [[:File:samsung foundry - 45, 65, 90 (August, 2007).pdf|Samsung foundry - 45 nm, 65 nm, 90 nm guide (August, 2007)]]
-** {{intel|Core (arch)|Core}}
-{{expand list}}
+[[category:lithography]]

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas