The 8 µm lithography process (8-micron) was the semiconductor process technology used for early FET devices by leading semiconductor companies during the late early 1970s. This process had a smallest feature or gate length of roughly 8 µm between the source and drain (Poly-SI channel implant). The typical wafer size for this process at companies such as Fairchild and TI was 2-inch (51 mm). This process was later superseded by 6 µm, 5 µm, and 3 µm processes.

Industry

The 8-micron process was used by Intel for many of their memory chips in the early 1970s such as the 2104 which was released in 1972 and became the first truly widely used DRAM chip. Those chips used Si-gate nMOS transistors using a polysilicon word line and an aluminum metal bit line. Alternatively to that was Mostek's which created a 4 Kib chip using an aluminum metal word line and drain diffusion for the bit line.

Foundry
Process Name
1st Production
Wafer	Type
	Size
Transistor	Technology
	Type
	Voltage
Metal Layers
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcell	High-Perf (HP)
	High-Density (HD)
	Low-Voltage (LV)
DRAM bitcell	eDRAM

Intel		TI		Fairchild		MOS Technology		MOSTEK
1972						1974		1972
Bulk		Bulk		Bulk		Bulk		Bulk
51 mm
nMOS, pMOS		pMOS		pMOS		nMOS		nMOS
Planar		Planar		Planar		Planar		Planar
5 V		5 V		5 V		5 V		5 V
1, 2
Value	10 µm Δ	Value	10 µm Δ	Value	10 µm Δ	Value	N/A	Value	N/A
8 µm	0.80x	8 µm	0.80x	8 µm	0.80x	8 µm		8 µm
1280 µm²

8 µm Microprocessors

• TI
  • TMS1000
• MOS Technology
  • MCS6500

This list is incomplete; you can help by expanding it.

8 µm Chips

• Intel
  • 1103, 1 Kib DRAM, world's first commercial DRAM
  • 2104, 4 Kib DRAM, world first widely used & mass produced (especially in the PC)

References

• Dr. Neil Berglund, Intel Corporation; The evolution of MOS process technology.

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