The 5μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process was later superseded by 3 µm, 2 µm, and 1.5 µm processes.

Industry

HP's NMOS II process as the name implied was a second generation nMOD process which was a shrink of their previous generation 7 µm nMOS also developed by HP's Loveland Division. The shrink was done in the hope they could double the speed while doubling density. Loveland went on on to create a third and final process, the NMOS III using a 1.5 µm process

Fab
Process Name​
1st Production​
Contacted Gate Pitch​
Interconnect Pitch​
Metal Layers​
Technology​
Wafer

HP
NMOS II
1973
? nm
? nm
nMOS
51 mm

5µm Microprocessors

• HP
  • 5061-30xx

This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.