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Difference between revisions of "7 nm lithography process"
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− | ! colspan="2" | [[Intel]] !! colspan="2" | [[Samsung]] !! colspan="2" | [[TSMC]] | + | ! colspan="2" | [[Intel]] !! colspan="2" | [[Samsung]] !! colspan="2" | [[TSMC]] !! colspan="2" | [[GlobalFoundries]] |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | P1276 || colspan="2" | || colspan="2" | | + | | colspan="2" | P1276 || colspan="2" | || colspan="2" | || colspan="2" | |
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="2" | || colspan="2" | || colspan="2" | | + | | colspan="2" | || colspan="2" | || colspan="2" | || colspan="2" | |
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− | ! Value !! [[10 nm]] Δ !! Value !! [[10 nm]] Δ !! Value !! [[10 nm]] Δ | + | ! Value !! [[10 nm]] Δ !! Value !! [[10 nm]] Δ !! Value !! [[10 nm]] Δ !! Value !! [[10 nm]] Δ |
|- | |- | ||
− | | ? nm || ?x || ? nm || ?x || ? nm || ?x | + | | ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x |
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− | | ? nm || ?x || ? nm || ?x || ? nm || ?x | + | | ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x |
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− | | ? nm || ?x || ? nm || ?x || ? nm || ?x | + | | ? nm || ?x || ? nm || ?x || ? nm || ?x || ? nm || ?x |
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− | | ? nm || ?x || 48 nm<ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x || ? nm || ?x | + | | ? nm || ?x || 48 nm<ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x || ? nm || ?x || ? nm || ?x |
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− | | ? nm || ?x || 36 nm<ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x || ? nm || ?x | + | | ? nm || ?x || 36 nm<ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x || ? nm || ?x || ? nm || ?x |
|- | |- | ||
− | | ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x | + | | ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x |
|- | |- | ||
− | | ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || 0.027 µm<sup>2</sup><ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x | + | | ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || 0.027 µm<sup>2</sup><ref>http://www.cdrinfo.com/Sections/News/Details.aspx?NewsId=49153</ref> || ?x || ? µm<sup>2</sup> || ?x |
{{scrolling table/end}} | {{scrolling table/end}} | ||
Revision as of 10:22, 16 November 2016
The 7 nanometer (7 nm) lithography process is a full node semiconductor manufacturing process following the 10 nm process node. Commercial integrated circuit manufacturing using 7 nm process is set to begin sometimes in 2019 or 2020. This technology will be replaced by 5 nm process around 2022.
Industry
Fab |
---|
Process Name |
1st Production |
|
Fin Pitch |
Fin Width |
Fin Height |
Contacted Gate Pitch |
Interconnect Pitch (M1P) |
SRAM bit cell (HP) |
SRAM bit cell (HD) |
Intel | Samsung | TSMC | GlobalFoundries | ||||
---|---|---|---|---|---|---|---|
P1276 | |||||||
Value | 10 nm Δ | Value | 10 nm Δ | Value | 10 nm Δ | Value | 10 nm Δ |
? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
? nm | ?x | 48 nm[1] | ?x | ? nm | ?x | ? nm | ?x |
? nm | ?x | 36 nm[2] | ?x | ? nm | ?x | ? nm | ?x |
? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x |
? µm2 | ?x | ? µm2 | ?x | 0.027 µm2[3] | ?x | ? µm2 | ?x |
7 nm Microprocessors
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7 nm System on Chips
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