Revision as of 12:04, 22 January 2017

Semiconductor lithography processes technology

1 nm 2 nm 3 nm 5 nm 7 nm 10 nm 14 nm 16 nm 20 nm 22 nm 28 nm 32 nm 40 nm 45 nm 55 nm 65 nm 80 nm 90 nm 110 nm 130 nm 150 nm 180 nm 220 nm 240 nm 250 nm 280 nm 350 nm 500 nm 600 nm 650 nm 700 nm 750 nm 800 nm 1 µm 1.2 µm 1.3 µm 1.5 µm 2 µm 2.5 µm 3 µm 3.5 µm 5 µm 6 µm 7 µm 8 µm 10 µm 16 µm 20 µm 50 µm

v · d · e

The 8 µm lithography process was the semiconductor process technology used by some semiconductor companies during the late 1960s through the early 1970s. This process had an effective channel length of roughly 8 µm between the source and drain (Poly-SI channel implant). The typical wafer size for this process at companies such as Fairchild and TI was 2-inch (51 mm). This process was later superseded by 6 µm, 5 µm, and 3 µm processes.

Industry

8 µm Microprocessors

• TI
  • TMS1000
• MOS Technology
  • MCS6500

This list is incomplete; you can help by expanding it.

8 µm Chips

• Intel
  • 1103, 1Kb DRAM, worlds first commercial DRAM

This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.