Semiconductor & Computer Engineering
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Difference between revisions of "500 nm lithography process"
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Revision as of 22:54, 26 April 2016
Semiconductor lithography processes technology
The 500 nm lithography process is a full node semiconductor manufacturing process following the 600 nm process. Commercial integrated circuit manufacturing using 500 nm process began in 1992. 500 nm and was phased out and later replaced by 350 nm in 1995.
Industry
| Fab |
|---|
| Process Name |
| 1st Production |
| Metal Layers |
| |
| Contacted Gate Pitch |
| Interconnect Pitch (M1P) |
| SRAM bit cell |
| Intel | AMD | DEC | Fujitsu | Hitachi | HP | IBM | TI | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| P852 | CMOS-5 | CMOS14C | CMOS-5X | ||||||||||||
| 1994 | 1993 | 1993 | 1994 | 1994 | 1996 | 1994 | 1995 | ||||||||
| 3 | 4 | 3 | 4 | 5 | 4 | 4 | |||||||||
| Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ | Value | 800 nm Δ |
| ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
| ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x | ? nm | ?x |
| 44 µm2 | 0.40x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x | ? µm2 | ?x |
500 nm Microprocessors
- Sun
- microSPARC II, 1994
- UltraSPARC
- HP
- AMD
- DEC
- Fujitsu
- microSPARC II ("Swift")
- Ross
- hyperSPARC ("Colorado 2")
- Hitachi
- IBM
- NexGen
- Intel
This list is incomplete; you can help by expanding it.
500 nm Microarchitectures
This list is incomplete; you can help by expanding it.