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Difference between revisions of "3.5 µm lithography process"
(Created page with "{{Lithography processes}} The '''3.5 μm lithography process''' was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This proces...") |
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{{Lithography processes}} | {{Lithography processes}} | ||
− | The '''3.5 μm lithography process''' was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process was later superseded by [[3 µm]], [[2 µm]], and [[1.5 µm]] processes. | + | The '''3.5 μm lithography process''' was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process had an effective channel length of roughly 3.5 µm between the source and drain. This process was later superseded by [[3 µm]], [[2 µm]], and [[1.5 µm]] processes. |
+ | |||
+ | == Industry == | ||
+ | {{scrolling table/top|style=text-align: right; | first=Fab | ||
+ | |Process Name | ||
+ | |1st Production | ||
+ | |Contacted Gate Pitch | ||
+ | |Interconnect Pitch | ||
+ | |Metal Layers | ||
+ | |Technology | ||
+ | |Wafer | ||
+ | }} | ||
+ | {{scrolling table/mid}} | ||
+ | |- | ||
+ | ! [[Intel]] || [[Intel]] || [[Motorola]] | ||
+ | |- style="text-align: center;" | ||
+ | | HMOS-I || HMOS-E || | ||
+ | |- style="text-align: center;" | ||
+ | | 1977 || || | ||
+ | |- | ||
+ | | ? nm || ? nm || ? nm | ||
+ | |- | ||
+ | | ? nm || ? nm || ? nm | ||
+ | |- | ||
+ | | 1 || 2 || ? | ||
+ | |- | ||
+ | | nMOS || nMOS || nMOS | ||
+ | |- | ||
+ | | ?" || ?" || ?" | ||
+ | {{scrolling table/end}} | ||
== 3.5 μm microcontrollers == | == 3.5 μm microcontrollers == | ||
− | * {{bell|BELLMAC-4| | + | * Intel |
+ | ** {{intel|8051}} | ||
+ | * Bell Labs | ||
+ | ** {{bell|BELLMAC-4}} | ||
+ | * Motorola | ||
+ | ** {{motorola|68000}} | ||
+ | ** {{motorola|68010}} | ||
{{expand list}} | {{expand list}} | ||
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{{stub}} | {{stub}} | ||
+ | |||
+ | [[category:lithography]] |
Latest revision as of 05:21, 20 July 2018
The 3.5 μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process had an effective channel length of roughly 3.5 µm between the source and drain. This process was later superseded by 3 µm, 2 µm, and 1.5 µm processes.
Industry[edit]
Fab |
---|
Process Name |
1st Production |
Contacted Gate Pitch |
Interconnect Pitch |
Metal Layers |
Technology |
Wafer |
3.5 μm microcontrollers[edit]
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