Revision as of 15:30, 4 June 2016

Semiconductor lithography processes technology

1 nm 2 nm 3 nm 5 nm 7 nm 10 nm 14 nm 16 nm 20 nm 22 nm 28 nm 32 nm 40 nm 45 nm 55 nm 65 nm 80 nm 90 nm 110 nm 130 nm 150 nm 180 nm 220 nm 240 nm 250 nm 280 nm 350 nm 500 nm 600 nm 650 nm 700 nm 750 nm 800 nm 1 µm 1.2 µm 1.3 µm 1.5 µm 2 µm 2.5 µm 3 µm 3.5 µm 5 µm 6 µm 7 µm 8 µm 10 µm 16 µm 20 µm 50 µm

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The 20 µm lithography process was the semiconductor process technology used by semiconductor companies during the mid to late 1960s. This process had an effective channel length of roughly 20 µm between the source and drain (channel implant). The typical wafer size for this process was 0.875 inch (22 mm). The standard transistor packages those years were the TO-5 and TO-18 (Transistor Outline) metal-can packages and dual in-line packages.

Industry

20 µm Chips

• RCA
  • CD4000 Series, earliest complete family of CMOS logic circuits

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