Revision as of 08:39, 26 April 2016

Semiconductor lithography processes technology

1 nm 2 nm 3 nm 5 nm 7 nm 10 nm 14 nm 16 nm 20 nm 22 nm 28 nm 32 nm 40 nm 45 nm 55 nm 65 nm 80 nm 90 nm 110 nm 130 nm 150 nm 180 nm 220 nm 240 nm 250 nm 280 nm 350 nm 500 nm 600 nm 650 nm 700 nm 750 nm 800 nm 1 µm 1.2 µm 1.3 µm 1.5 µm 2 µm 2.5 µm 3 µm 3.5 µm 5 µm 6 µm 7 µm 8 µm 10 µm 16 µm 20 µm 50 µm

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The 5μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s. This process was later superseded by 3 µm, 2 µm, and 1.5 µm processes.

Industry

HP's NMOS II process as the name implied was a second generation nMOD process which was a shrink of their previous generation 7 µm nMOS also developed by HP's Loveland Division. The shrink was done in the hope they could double the speed while doubling density. Loveland went on on to create a third and final process, the NMOS III using a 1.5 µm process. While they succeeded in doubling the density and more than ten-folding the speed, the complexity of the chip still required them to fabricate it on 3 seperate dies and package them together.

5µm Microprocessors

• HP
  • 5061-30xx

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