Semiconductor & Computer Engineering
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- |designer=ARM Holdings ...performance processors (e.g. based on {{armh|Cortex-A57|l=arch}} or {{armh|Cortex-A72|l=arch}}) in {{armh|big.LITTLE}} configuration to achieve better energy/per6 KB (758 words) - 13:01, 6 March 2022
- #REDIRECT [[arm holdings/microarchitectures/cortex-a53]]56 bytes (5 words) - 03:45, 4 December 2016
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56 bytes (5 words) - 01:58, 5 December 2016
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56 bytes (5 words) - 01:58, 5 December 2016
- |designer=ARM Holdings ...to the {{armh|Cortex-A53|l=arch}}. The Cortex-A55, which implemented the {{arm|ARMv8.2}} ISA, is typically found in entry-level smartphone and other embed4 KB (603 words) - 04:23, 27 April 2023
- |designer=ARM Holdings ...be implemented in their own chips. The Cortex-A75, which implemented the {{arm|ARMv8.2}} ISA, is the a performant core which is often combined with a numb2 KB (278 words) - 03:26, 6 May 2024
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56 bytes (5 words) - 13:13, 29 May 2017
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56 bytes (5 words) - 13:22, 29 May 2017
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a7514 KB (2,183 words) - 17:15, 17 October 2020
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a7617 KB (2,555 words) - 06:08, 16 June 2023
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a7721 KB (3,067 words) - 09:25, 31 March 2022
- |designer=ARM Holdings |predecessor=Cortex-A722 KB (205 words) - 23:49, 4 April 2021
- {{armh title|Cortex-A72|arch}} |name=Cortex-A722 KB (291 words) - 15:57, 4 July 2022
- |designer=ARM Holdings |successor=Cortex-A724 KB (474 words) - 21:13, 25 April 2021
- |designer=ARM Holdings ...low-power high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza3 KB (347 words) - 14:40, 31 December 2018
- |designer=ARM Holdings ...}, a low-power performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza2 KB (285 words) - 12:27, 28 July 2019
- |designer=ARM Holdings ...es to be implemented in their own chips. The Cortex-A8 was designed by the Arm Austin design center.3 KB (428 words) - 14:30, 31 December 2018
- |designer=ARM Holdings ...=arch}}, a high efficiency [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza2 KB (275 words) - 14:24, 31 December 2018
- |designer=ARM Holdings ...}, a mid-range performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza1 KB (167 words) - 14:25, 31 December 2018
- |designer=ARM Holdings ...}, a mid-range performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza2 KB (184 words) - 14:25, 31 December 2018
- |designer=ARM Holdings ...arch}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza1 KB (159 words) - 14:25, 31 December 2018
- |designer=ARM Holdings ...arch}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza839 bytes (98 words) - 00:00, 23 September 2019
- |designer=ARM Holdings ...-A35}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza787 bytes (98 words) - 18:48, 7 April 2020
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56 bytes (5 words) - 16:09, 29 December 2018
- {{armh title|Cortex}}[[File:arm cortex logo.svg|thumb|right|class=wikichip_ogimage|Logo]] ...various edge market such as embedded and mobile. The Cortex family succeed Arm's {{\\|classic}} cores with more specialized cores with highly targeted req3 KB (404 words) - 01:01, 5 September 2022
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56 bytes (5 words) - 03:20, 1 January 2019
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56 bytes (5 words) - 03:22, 1 January 2019
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56 bytes (5 words) - 00:09, 17 June 2019
- |designer=ARM Holdings ...-A35}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesiza1 KB (179 words) - 03:34, 4 December 2021
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a78728 bytes (80 words) - 13:49, 4 July 2022
- |designer=ARM Holdings ...be implemented in their own chips. The Cortex-M55, which implements the {{arm|ARMv8.1-M}} ISA, is an ultra-low-power core which is often found in microco12 KB (1,806 words) - 10:51, 12 January 2021
- |designer=ARM Holdings |successor link=arm holdings/microarchitectures/cortex-x27 KB (995 words) - 14:21, 4 July 2022
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a710625 bytes (70 words) - 13:51, 4 July 2022
- |designer=ARM Holdings ...to the {{armh|Cortex-A55|l=arch}}. The Cortex-A510, which implements the {{arm|ARMv9.0}} ISA, is typically found in smartphone and other embedded devices.15 KB (2,282 words) - 11:20, 10 January 2023
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-x1588 bytes (63 words) - 14:27, 4 July 2022
- |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-x2590 bytes (63 words) - 14:29, 4 July 2022
Page text matches
- * ARM Holdings6 KB (711 words) - 17:01, 26 March 2019
- {{title|ARM Holdings}} | name = Arm Holdings6 KB (733 words) - 22:02, 3 November 2022
- | developer 2 = Arm Holdings | arch = Multicore 64-bit ARM SoCs7 KB (902 words) - 16:33, 12 January 2023
- |designer 2=ARM Holdings |isa family=ARM5 KB (669 words) - 14:35, 5 August 2020
- | designer 2 = ARM Holdings | isa family = ARM6 KB (647 words) - 09:57, 12 January 2018
- | designer 2 = ARM Holdings | isa family = ARM6 KB (670 words) - 09:36, 22 August 2018
- |designer=ARM Holdings ...performance processors (e.g. based on {{armh|Cortex-A57|l=arch}} or {{armh|Cortex-A72|l=arch}}) in {{armh|big.LITTLE}} configuration to achieve better energy/per6 KB (758 words) - 13:01, 6 March 2022
- |designer 2=ARM Holdings |isa family=ARM2 KB (235 words) - 15:00, 15 February 2019
- #REDIRECT [[arm holdings/microarchitectures/cortex-a53]]56 bytes (5 words) - 03:45, 4 December 2016
- |designer 2=ARM Holdings |isa family=ARM6 KB (713 words) - 21:16, 2 May 2021
- | designer 2 = ARM Holdings | isa family = ARM6 KB (617 words) - 02:35, 14 December 2019
- |designer 2=ARM Holdings |isa family=ARM5 KB (581 words) - 14:25, 12 September 2019
- |designer 2=ARM Holdings |isa family=ARM5 KB (574 words) - 04:36, 23 June 2019
- |designer 2=ARM Holdings |isa family=ARM5 KB (600 words) - 08:55, 12 October 2023
- |designer 2=ARM Holdings |isa family=ARM4 KB (549 words) - 16:22, 29 December 2018
- |designer 2=ARM Holdings |isa family=ARM5 KB (696 words) - 17:41, 15 August 2020
- |designer 2=ARM Holdings |isa family=ARM5 KB (614 words) - 09:40, 12 February 2020
- |designer 2=ARM Holdings |isa family=ARM4 KB (552 words) - 23:18, 3 November 2019
- |designer 2=ARM Holdings |isa family=ARM4 KB (473 words) - 04:40, 23 June 2019
- |designer 2=ARM Holdings |isa family=ARM4 KB (564 words) - 06:22, 30 March 2021
- | developer 2 = ARM Holdings | arch = ARM performance processors10 KB (1,247 words) - 00:25, 8 November 2023
- |designer 2=ARM Holdings |isa family=ARM4 KB (533 words) - 21:28, 27 March 2018
- | designer 2 = ARM Holdings | isa family = ARM4 KB (386 words) - 04:42, 7 April 2022
- | designer 2 = ARM Holdings | isa family = ARM3 KB (309 words) - 15:24, 5 September 2018
- | designer = ARM Holdings | isa family = ARM4 KB (473 words) - 09:26, 3 December 2019
- |designer=ARM Holdings ...to the {{armh|Cortex-A53|l=arch}}. The Cortex-A55, which implemented the {{arm|ARMv8.2}} ISA, is typically found in entry-level smartphone and other embed4 KB (603 words) - 04:23, 27 April 2023
- |designer=ARM Holdings ...be implemented in their own chips. The Cortex-A75, which implemented the {{arm|ARMv8.2}} ISA, is the a performant core which is often combined with a numb2 KB (278 words) - 03:26, 6 May 2024
- == [[ARM Holdings]]== * {{armh|Cortex-A72|l=arch}}6 KB (914 words) - 11:36, 4 June 2020
- | developer 2 = ARM Holdings '''R-Car''' is a family of embedded high-end [[ARM]]/[[SuperH]] [[system-on-chips]] for the automotive industry.6 KB (708 words) - 14:35, 24 March 2019
- |designer 2=ARM Holdings |isa family=ARM3 KB (467 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (415 words) - 16:32, 13 December 2017
- {{main|arm holdings/microarchitectures/cortex-a9#Memory_Hierarchy|l1=Cortex-A9 § Cache}}2 KB (299 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM2 KB (337 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM2 KB (248 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (420 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (409 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (409 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM2 KB (346 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (365 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (383 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM4 KB (571 words) - 15:43, 29 December 2018
- |designer 2=ARM Holdings |isa family=ARM4 KB (495 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa family=ARM3 KB (467 words) - 04:41, 21 July 2018
- |designer 2=ARM Holdings |isa family=ARM2 KB (334 words) - 16:13, 13 December 2017
- | developer 2 = ARM Holdings | arch = Performance mobile ARM SOCs3 KB (316 words) - 06:18, 3 October 2023
- |designer 2=ARM Holdings |isa family=ARM6 KB (824 words) - 17:25, 1 January 2022
- |designer 2=ARM Holdings |isa family=ARM4 KB (534 words) - 05:37, 26 May 2023
- |designer 2=ARM Holdings |isa family=ARM2 KB (307 words) - 06:55, 26 June 2019
- * February 5: [[Ampere Computing]] announces their first ARM processor, the {{ampere|A1}}. * February 13: [[ARM Holdings|ARM]] announces two new [[neural processors]] IPs - the {{armh|ML processor}} f5 KB (639 words) - 01:27, 30 December 2019
- |designer 2=ARM Holdings |isa family=ARM5 KB (622 words) - 10:43, 7 March 2024
