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Cortex-A32 - Microarchitectures - ARM
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Cortex-A32 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionFebruary 23, 2016
Pipeline
Stages8
Instructions
ISAARMv8 AArch32
ExtensionsNEON (optional), Cryptography (optional)
Cache
L1I Cache8k-64k
L1D Cache8k-64k
L2 Cache128KB-1MB
Succession

Cortex-A32 (codename Minerva) is the successor to the Cortex-A35, an ultra-low power ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.

Architecture[edit]

Key changes from Cortex-A5[edit]

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codenameCortex-A32 +
designerARM Holdings +
first launchedFebruary 23, 2016 +
full page namearm holdings/microarchitectures/cortex-a32 +
instance ofmicroarchitecture +
instruction set architectureARMv8 AArch32 +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A32 +
pipeline stages8 +