Helio X10 T (MT6795T; T for turbo) is a 64-bitocta-coreARMLTE system on a chip designed by MediaTek and introduced in early-2015. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 28 nm process, operates at up to 2.2 GHz and supports dual-channel LPDDR3-1866. This chip incorporates the PowerVR G6200IGP operating at 700 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 4. This "turbo" variant of the X10 operates at 10% higher frequency.
This SoC is made of 2 clusters of 4-core each (Cortex-A53) linked together via a CCI-400, a NEON engine, and Cortex-R4 core for the second MCU subsystem.
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.
The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.
Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.