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Cortex-A17 - Microarchitectures - ARM
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Cortex-A17 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionFebruary 11, 2014
Instructions
ISAARMv7
Succession

Cortex-A17 is the successor to the Cortex-A12, a mid-range performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A17 was designed to be paired with the low-power Cortex-A7 in a big.LITTLE configuration.

Architecture[edit]

Key changes from Cortex-A12[edit]

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Block Diagram[edit]

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Memory Hierarchy[edit]

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Licensees[edit]

Arm named the following companies as licensees.

Die[edit]

MediaTek MT6595[edit]

  • TSMC 28 nm process
  • 89 mm² die size
  • Quad-core Cortex-A7
    • ~0.48 mm² per core
  • Quad-core Cortex-A17 + 2 MiB L2
    • ~1.93 mm² per core
    • ~3.93 mm² for 2 MiB L2

(small quad-core is unlabeled below the big core cluster)

mt6595 die shot.png

Bibliography[edit]

  • Mair, Hugh, et al. "23.3 A highly integrated smartphone SoC featuring a 2.5 GHz octa-core CPU with advanced high-performance and low-power techniques." Solid-State Circuits Conference-(ISSCC), 2015 IEEE International. IEEE, 2015.
codenameCortex-A17 +
designerARM Holdings +
first launchedFebruary 11, 2014 +
full page namearm holdings/microarchitectures/cortex-a17 +
instance ofmicroarchitecture +
instruction set architectureARMv7 +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A17 +