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Kirin 970 - HiSilicon
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Kirin 970
kirin 970.png
General Info
DesignerHiSilicon, ARM Holdings
Model Number970
IntroductionSeptember 1, 2017 (announced)
September 1, 2017 (launched)
General Specs
Frequency1,800 MHz, 2,360 MHz
MicroarchitectureCortex-A53, Cortex-A73
Core NameCortex-A53, Cortex-A73
Process10 nm
Die96.72 mm²
9.75 mm × 9.92 mm
Word Size64 bit
Max CPUs1 (Uniprocessor)
Max Memory6 GiB

Kirin 970 is a 64-bit octa-core high-performance mobile ARM LTE SoC introduced by HiSilicon in mid-2017 at the 2017 IFA. This chip, which is fabricated on a 10 nm process, features four Cortex-A73 big cores operating at up to 2.36 GHz along with four Cortex-A53 little cores operating at up to 1.8 GHz. The 970 incorporates ARM's Mali G72 (12 core) IGP operating at 850 MHz and supports up to 6 GiB of dual-channel LPDDR4-1866 memory.


Introduced at the 2017 IFA, the overall core organization is identical to the Kirin 960 which was introduced the previous year, but features 20% power efficiency and 40% smaller die area due to the process shrink. The 970 ballooned to over 37.5% more transistors from 4 billion in the 960 to 5.5 billion. The 970 adds many enhancements, including a more powerful Mali G72 GPU and incorporates a new Neural Network Processing Unit (NPU) designed for AI acceleration. The 970 has two improved ISPs and a more powerful LTE modem supporting up to User Equipment (UE) category 18 capable of reaching a maximum downlink of 1.2 Gbps (4x4 MIMO, 256 QAM, 3CC CA).


Main articles: Cortex-A53 § Cache and Cortex-A73 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
New text document.svg This section requires expansion; you can help adding the missing info.

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4-1866
Supports ECCNo
Max Mem6 GiB
Width64 bit
Max Bandwidth27.82 GiB/s
Single 13.91 GiB/s
Double 27.82 GiB/s


[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
DesignerARM Holdings
Execution Units12Max Displays2
Frequency850 MHz
0.85 GHz
850,000 KHz

OpenGL ES3.2
  • Hardware Acceleration
    • Decode: 2160p @ 60fps
    • Encode: 2160p @ 30fps


  • LTE Modem
    • Up to User Equipment (UE) category 18
      • Downlink of up to 1.2 Gbps (4x4 MIMO, 256 QAM, 3CC CA)
      • Uplink of up to 150 Mbps (2x20MHz CA, 64-QAM)
  • Wi-Fi 802.11 ac Dual Band
  • Bluetooth 4.2
  • NFC


Neural Network Processing Unit (NPU)[edit]

kirin 970 npu.png

The Kirin 970 incorporates a new Neural Network Processing Unit (NPU) designed specifically to be used as an AI accelerator. According to CEO Richard Yu, who also introduced the processor at 2017 IFA, the NPU uses up the die area of roughly half of the CPU while consuming 50% less power and performing around 25 times faster than a traditional CPU for tasks such as photo recognition. The NPU is said to deliver 1.92 TFLOPs (HP 16-bit). While the exact architectural details of the NPU have been withheld, the NPU appear to be a licensed IP design from Cambricon Technologies.

Utilizing devices[edit]

  • Huawei Honor V10 (Honor View 10)
  • Huawei Honor 10
  • Huawei Mate 10
  • Huawei Mate 10 Pro
  • Huawei Mate 10 Porsche Design
  • Hikey970
  • Huawei Honor Play
  • Huawei P20
  • Huawei P20 Pro
  • Huawei Mate RS Porsche Design
  • Honor 10
  • Huawei Nova 3

This list is incomplete; you can help by expanding it.

Facts about "Kirin 970 - HiSilicon"
base frequency1,800 MHz (1.8 GHz, 1,800,000 kHz) + and 2,360 MHz (2.36 GHz, 2,360,000 kHz) +
core count8 +
core nameCortex-A53 + and Cortex-A73 +
designerHiSilicon + and ARM Holdings +
die area96.72 mm² (0.15 in², 0.967 cm², 96,720,000 µm²) +
die length9.75 mm (0.975 cm, 0.384 in, 9,750 µm) +
die width9.92 mm (0.992 cm, 0.391 in, 9,920 µm) +
familyKirin +
first announcedSeptember 1, 2017 +
first launchedSeptember 1, 2017 +
full page namehisilicon/kirin/970 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuMali-G72 +
integrated gpu base frequency850 MHz (0.85 GHz, 850,000 KHz) +
integrated gpu designerARM Holdings +
isaARMv8 +
isa familyARM +
ldateSeptember 1, 2017 +
main imageFile:kirin 970.png +
manufacturerTSMC +
market segmentMobile +
max cpu count1 +
max memory6,144 MiB (6,291,456 KiB, 6,442,450,944 B, 6 GiB, 0.00586 TiB) +
microarchitectureCortex-A53 + and Cortex-A73 +
model number970 +
nameKirin 970 +
process10 nm (0.01 μm, 1.0e-5 mm) +
series900 +
supported memory typeLPDDR4-1866 +
technologyCMOS +
thread count8 +
transistor count5,500,000,000 +
used byHuawei Honor V10 (Honor View 10) +, Huawei Honor 10 +, Huawei Mate 10 +, Huawei Mate 10 Pro +, Huawei Mate 10 Porsche Design +, Hikey970 +, Huawei Honor Play +, Huawei P20 +, Huawei P20 Pro +, Huawei Mate RS Porsche Design +, Honor 10 + and Huawei Nova 3 +
word size64 bit (8 octets, 16 nibbles) +