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K3V2 - HiSilicon
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K3V2
hi3620.png
General Info
DesignerHiSilicon,
ARM Holdings
ManufacturerTSMC
Model NumberK3V2
Part NumberHi3620
MarketMobile
IntroductionFebruary 26, 2012 (announced)
February 26, 2012 (launched)
General Specs
FamilyK3
Frequency1,500 MHz
Microarchitecture
ISAARMv7 (ARM)
MicroarchitectureCortex-A9
Core NameCortex-A9
Process40 nm
Transistors600,000,000
TechnologyCMOS
Word Size32 bit
Cores4
Threads4
Max CPUs1 (Uniprocessor)
Packaging
PackageTFBGA-576 (BGA)
Dimension11.90 mm x 11.90 mm
Pitch0.5 mm
Pins576

K3V2 is a 32-bit quad-core mobile ARM microprocessor introduced by HiSilicon in early 2012. This chip, which is fabricated on a 40 nm process, incorporates four Cortex-A9 cores operating at 1.5 GHz. The K3V2 integrated Vivante's GC4000 (16 cores) IGP and supports up to 2 channels of LPDDR2-900 memory.

Cache[edit]

Main article: Cortex-A9 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
L1I$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB4-way set associative 
L1D$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB4-way set associative 

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  1x1 MiB8-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR2-900
Supports ECCNo
Controllers1
Channels2
Width32 bit
Max Bandwidth6.71 GiB/s
Bandwidth
Single 3.35 GiB/s
Double 6.71 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUGC4000
DesignerVivante
Execution Units16Max Displays1
Frequency480 MHz
0.48 GHz
480,000 KHz
OutputDSI

Max Resolution
DSI1920x1200

Standards
DirectX11
OpenGL3.0
OpenCL1.2
OpenGL ES3.1
OpenVG1.1

Expansions[edit]

  • 4x high-speed UART interfaces
  • 2x SPI
  • 2x I2C + 2x I2C for camera
  • USB 2.0 On-The-Go (HS OTG) PHY
  • USB 1.1
  • 2x MMC/SD/SDIO interface
  • 22x GPIOs
  • 10 Timers

Block Diagram[edit]

hisilicon k3v2 block.png

Utilizing devices[edit]

  • Huawei Ascend D1 Quad XL (T9510E)
  • Huawei Ascend D2 (D2‐6114 HW‐03E/U9701L)
  • Huawei Ascend G330D (U8825D)
  • Huawei Ascend G350 (G350‐U00)
  • Huawei Ascend G700 (G700‐U00)
  • Huawei Ascend G716 (G716‐L070)
  • Huawei Ascend Mate 2 (TD‐LTE MT2‐L05)
  • Huawei Ascend P1 (P1 LTE U9202L‐2)
  • Huawei Ascend P2 (P6011)
  • Huawei Ascend P6 (P6‐U06)
  • Huawei Ascend P6S
  • Huawei Ascend W1 (W1‐U00)
  • Huawei Ascend Y201
  • Huawei Ascend Y300
  • Huawei Honor 2 (U9508)
  • Huawei Honor 3
  • Huawei Honor + (T8950)
  • Huawei MediaPad 10 FHD (LTE S10‐101L)
  • Huawei MediaPad 10 Link (3G S10‐201u, 3G S10‐202u, LTE‐A S10‐201L)
  • Huawei MediaPad 7 Lite (S7‐931u)
  • Huawei MediaPad 7 Vogue
  • Huawei MediaPad 7 Youth (S7‐702u)
  • Huawei STREAM X GL07S
  • Lexand A802
  • Huawei MediaQ M310

This list is incomplete; you can help by expanding it.

Facts about "K3V2 - HiSilicon"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
K3V2 - HiSilicon#package +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
core count4 +
core nameCortex-A9 +
designerHiSilicon + and ARM Holdings +
familyK3 +
first announcedFebruary 26, 2012 +
first launchedFebruary 26, 2012 +
full page namehisilicon/k3/k3v2 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuGC4000 +
integrated gpu base frequency480 MHz (0.48 GHz, 480,000 KHz) +
integrated gpu designerVivante +
isaARMv7 +
isa familyARM +
l1$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1d$ description4-way set associative +
l1d$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1i$ description4-way set associative +
l1i$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateFebruary 26, 2012 +
main imageFile:hi3620.png +
manufacturerTSMC +
market segmentMobile +
max cpu count1 +
max memory channels2 +
microarchitectureCortex-A9 +
model numberK3V2 +
nameK3V2 +
packageTFBGA-576 +
part numberHi3620 +
process40 nm (0.04 μm, 4.0e-5 mm) +
supported memory typeLPDDR2-900 +
technologyCMOS +
thread count4 +
transistor count600,000,000 +
used byHuawei Ascend D1 Quad XL +, Huawei Ascend D2 +, Huawei Ascend G330D +, Huawei Ascend G350 +, Huawei Ascend G700 +, Huawei Ascend G716 +, Huawei Ascend Mate 2 +, Huawei Ascend P1 +, Huawei Ascend P6 +, Huawei Ascend P6S +, Huawei Ascend W1 +, Huawei Ascend Y201 +, Huawei Ascend Y300 +, Huawei Honor 2 +, Huawei Honor + +, Huawei MediaPad 10 FHD +, Huawei MediaPad 10 Link +, Huawei MediaPad 7 Lite +, Huawei MediaPad 7 Vogue +, Huawei MediaPad 7 Youth +, Huawei STREAM X GL07S +, Lexand A802 +, Huawei Honor 3 +, Huawei MediaQ M310 + and Huawei Ascend P2 +
word size32 bit (4 octets, 8 nibbles) +