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  • == [[Centaur Technology]] == == [[Cypress Semiconductor]] ==
    12 KB (1,182 words) - 13:35, 13 March 2022
  • |technology=pMOS [[File:KL National INS4004.jpg|100px|thumbnail|left|A National Semiconductor version of the 4004, INS4004J]]
    5 KB (748 words) - 21:37, 21 November 2021
  • ...aging]] solution that utilizes the [[controlled collapse chip connection]] technology, also known as [[flip chip]], for its [[die]] to [[substrate]] interconnect fcBGA packages is used in all main semiconductor manufacturers such as in the latest [[Intel]]'s [[Core i7]], [[Texas Instru
    2 KB (239 words) - 07:17, 17 December 2013
  • ...of the incorporated [[central processing unit|CPU]], the [[semiconductor]] technology involved, and the properties of the overall system. Some common specificati * '''[[logic family|technology]]''' - the semiconductor technology used to create the MPU (e.g. [[CMOS]], [[BiCMOS]], and [[TTL]])
    8 KB (1,149 words) - 00:41, 16 September 2019
  • ...process''' was the [[semiconductor process]] technology used by the major semiconductor companies during the years of 1967 and 1973. This process had an effective |Technology
    2 KB (177 words) - 23:04, 20 May 2018
  • ...thography process''' was the semiconductor process technology used by some semiconductor companies during the early to mid 1970s. This process was later superseded |Technology
    1 KB (119 words) - 23:04, 20 May 2018
  • ...thography process''' was the semiconductor process technology used by some semiconductor companies during the mid 1970s to the mid 1980s. <!-- VLSI Technology -->
    3 KB (314 words) - 23:04, 20 May 2018
  • ...raphy process''' was the semiconductor process technology used by the some semiconductor companies in the mid to late 1980s. By the mid 80s this process was replace | fab 10 name link = vlsi technology
    8 KB (969 words) - 12:31, 22 February 2019
  • ...aphy process''' was the semiconductor process technology used by the major semiconductor companies in the mid 1980s. This process had an effective channel length of
    3 KB (332 words) - 23:04, 20 May 2018
  • ...aphy process''' was the semiconductor process technology used by the major semiconductor companies between in the late 1980s. 1 µm was phased out in the early 1990 |Technology
    1 KB (166 words) - 23:04, 20 May 2018
  • |technology=CMOS In 1988, the NC4016 design was licensed and improved by Harris Semiconductor which later rebranded the chip as the [[RTX2000]], a radiation hardened ver
    2 KB (257 words) - 16:31, 13 December 2017
  • ...the semiconductor process technology used for early FET devices by leading semiconductor companies during the late early 1970s. This process had a smallest feature | fab 4 name link = mos technology
    5 KB (632 words) - 23:04, 20 May 2018
  • | developer = Fairchild Semiconductor | manufacturer = Fairchild Semiconductor
    2 KB (291 words) - 23:48, 10 July 2017
  • XGC Technology offers a [[C]] and [[C++]] compiler and simulator for the F9450. The Compil [[Category:Fairchild Semiconductor microprocessors]]
    2 KB (253 words) - 16:27, 20 December 2015
  • {{title|MOSFET - Metal-Oxide-Semiconductor Field-Effect-Transistor}}[[File:Electronic component mosfets.jpg|thumb|[[di ...re made of polycrystalline sillicon although in recent years, advancements technology reintroduced metallic gates in order to solve various performance issues.
    8 KB (1,362 words) - 23:38, 17 November 2015
  • '''Intel Corporation''' is an American [[semiconductor]] company. While most notably known for their development of [[microprocess * {{\\|Process Technology}}
    9 KB (1,150 words) - 00:03, 2 October 2022
  • | developer = National Semiconductor | manufacturer = National Semiconductor
    2 KB (274 words) - 18:29, 5 February 2016
  • | developer = National Semiconductor | manufacturer = National Semiconductor
    6 KB (685 words) - 22:49, 5 February 2016
  • | developer = Fairchild Semiconductor | manufacturer = Fairchild Semiconductor
    2 KB (223 words) - 23:04, 5 October 2017
  • ...semiconductor]] and introduced in 1974. The chips were made using [[PMOS]] technology. Units could be combined to implement systems with 8 to 32-bit words. The I [[Category:National Semiconductor microprocessors]]
    1 KB (137 words) - 12:37, 21 July 2018
  • ...semiconductor]] and introduced in 1973. The chips were made using [[PMOS]] technology. Like the {{national|IMP-8}}, the IMP-16 was designed using 4 {{national|IM [[Category:National Semiconductor microprocessors]]
    1 KB (172 words) - 19:22, 5 November 2015
  • | developer = Fairchild Semiconductor | manufacturer = Fairchild Semiconductor
    3 KB (283 words) - 17:18, 12 December 2016
  • {{national title|MM5700}}{{confuse|national semiconductor/maps|l1=National MAPS (MM570X Series)}} ...designed by [[National Semiconductor]]. The chips were made using [[PMOS]] technology, most designed for 9V battery, had an a very limited set of math operations
    2 KB (231 words) - 05:26, 10 November 2015
  • | desc 3 = Technology Indicator * '''Technology indicator:'''
    7 KB (851 words) - 20:53, 29 July 2021
  • .... A '''logic family''' is a collection of devices that share the same core technology used to implement [[integrated circuit]]s logic (e.g. [[CMOS]] vs [[Bipolar ** [[metal-oxide-semiconductor field-effect transistor]] (MOSFET)
    1 KB (145 words) - 00:40, 26 December 2015
  • ...microelectronics division as a wholly owned subsidiary called [[Microchip Technology]].
    1 KB (102 words) - 03:18, 17 February 2016
  • ** [[allows value::semiconductor company]] ** [[allows value::technology]]
    2 KB (189 words) - 13:28, 11 August 2018
  • {{title|Myson Technology}} | name = Myson Technology
    1,010 bytes (100 words) - 08:15, 28 April 2016
  • {{title|Technology Node}}{{lithography processes}} ...0 nm]] refer purely to a specific generation of chips made in a particular technology. It does not correspond to any gate length or half pitch. Nevertheless, th
    8 KB (1,225 words) - 13:48, 14 December 2022
  • ...integrated circuit]] manufacturing using 28 nm process began in 2011. This technology superseded by commercial [[22 nm lithography process|22 nm process]]. ...], [[NEC]], [[STMicroelectronics]], [[Infineon Technologies]], [[Chartered Semiconductor Manufacturing]], [[Renasas]]</info>
    6 KB (711 words) - 17:01, 26 March 2019
  • ...integrated circuit]] manufacturing using 32 nm process began in 2010. This technology was superseded by the [[28 nm lithography process|28 nm process]] (HN) / [[ ...tion between [[IBM]], [[Samsung]], [[Freescale]], [[Toshiba]], [[Chartered Semiconductor Manufacturing]], [[Infineon Technologies ]]</info>
    10 KB (1,090 words) - 19:14, 8 July 2021
  • ...nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to gate length or half pitch. The 14 nm node was introduced in ...process should cater to the products that will make use of the underlying technology. The composition of the actual integrated circuit also varies by manufactur
    17 KB (2,243 words) - 19:32, 25 May 2023
  • ...integrated circuit]] manufacturing using 45 nm process began in 2007. This technology was superseded by the [[40 nm lithography process|40 nm process]] (HN) / [[ * Mistry, Kaizad, et al. "A 45nm logic technology with high-k+ metal gate transistors, strained silicon, 9 Cu interconnect la
    5 KB (602 words) - 05:51, 20 July 2018
  • ...ithography process''' was the [[semiconductor process]] technology used by semiconductor companies during the late 1960s. This process had an effective channel leng
    502 bytes (66 words) - 23:04, 20 May 2018
  • ...ithography process''' was the [[semiconductor process]] technology used by semiconductor companies during the mid to late 1960s. This process had an effective chann |Technology
    902 bytes (119 words) - 23:04, 20 May 2018
  • ...aphy process''' was the [[semiconductor process]] technology used by early semiconductor companies during the mid 1960s. This process had an effective channel (Alu)
    524 bytes (70 words) - 23:04, 20 May 2018
  • ...g using 22 nm process began in 2008 for memory and 2012 for [[MPU]]s. This technology was replaced by with [[20 nm lithography process|20 nm process]] (HN) in 20 * [[:File:22FFL-2017.pdf|Intel's 22FFL technology]]
    7 KB (891 words) - 09:52, 25 November 2020
  • ...ain size and its technology, as opposed to gate length or half pitch. This technology is set to be replaced with [[10 nm lithography process|10 nm process]] in 2 ...2016 TSMC announced a "12nm" process (e.g. 12FFC<info>12nm FinFET Compact Technology</info>) which uses the similar design rules as the 16nm node but a tighter
    4 KB (580 words) - 17:00, 26 March 2019
  • ...integrated circuit]] manufacturing using 20 nm process began in 2014. This technology superseded by commercial [[16 nm lithography process|16 nm process]]. <tr><th>Technology</th><td>20 nm HK-MG</td></tr>
    4 KB (483 words) - 23:04, 20 May 2018
  • ...ss began in 2008 by leading semiconductor companies such as [[TSMC]]. This technology superseded by commercial [[32 nm lithography process|32 nm process]] by 201
    2 KB (182 words) - 03:11, 17 August 2023
  • ...process began in late 2006 by companies such as [[TSMC]] and [[NEC]]. This technology superseded by commercial [[45 nm lithography process|45 nm process]].
    600 bytes (72 words) - 05:54, 20 July 2018
  • ...integrated circuit]] manufacturing using 65 nm process began in 2005. This technology was superseded by the [[55 nm lithography process|55 nm process]] (HN) / [[
    4 KB (407 words) - 05:55, 20 July 2018
  • ...ntegrated circuit]] manufacturing using 130 nm process began in 2001. This technology was replaced by with [[110 nm lithography process|110 nm process]] (HN) in * Tyagi, Sunit, et al. "A 130 nm generation logic technology featuring 70 nm transistors, dual Vt transistors and 6 layers of Cu interco
    5 KB (500 words) - 16:02, 13 May 2020
  • ...integrated circuit]] manufacturing using 90 nm process began in 2003. This technology was superseded by the [[80 nm lithography process|80 nm process]] (HN) / [[
    3 KB (354 words) - 03:09, 17 August 2023
  • ...ated circuit]] manufacturing using 180 nm process began in late 1998. This technology was replaced by with [[150 nm lithography process|150 nm process]] (HN) in
    4 KB (413 words) - 03:04, 17 August 2023
  • ...nm" is simply a commercial name for a generation of a certain size and its technology, as opposed to [[gate length]] or [[half pitch]]. The 10 nm node is current First introduced between 2017-2019, the 10 nm [[process technology]] is characterized by its use of [[FinFET]] transistors with a 30-40s nm [[
    14 KB (1,903 words) - 06:52, 17 February 2023
  • ...rated circuit]] fabricated using a 7 nm process began in 2018. The process technology will be phased out by leading-edge foundries by 2020/21 timeframe where it ...nm" is simply a commercial name for a generation of a certain size and its technology, and '''does not''' represent any geometry of the transistor.
    13 KB (1,941 words) - 02:40, 5 November 2022
  • The '''5 nanometer (5 nm) lithography process''' is a [[technology node]] semiconductor manufacturing process following the [[7 nm lithography process|7 nm process ...nm" is simply a commercial name for a generation of a certain size and its technology, and '''does not''' represent any geometry of the transistor.
    11 KB (1,662 words) - 02:58, 2 October 2022
  • ...nometer (250 nm) lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[350 nm lithography process|350 nm pro ...et al. "Intel’s 0.25 micron, 2.0 volts logic process technology." Intel Technology Journal Q 3 (1998): 1998.
    6 KB (661 words) - 16:18, 21 August 2022
  • ...ography process''' (350 nm or 0.35 µm) is a [[technology node|full node]] semiconductor manufacturing process following the [[500 nm lithography process|500 nm pro
    5 KB (586 words) - 22:44, 4 April 2022

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