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PPS-25 - Fairchild
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Fairchild PPS-25
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Developer Fairchild Semiconductor
Manufacturer Fairchild Semiconductor
Type microprocessors
Production 1971
Architecture 4-bit
Word size 4 bit
0.5 octets
1 nibbles
Technology pMOS
Clock 400 kHz
Package DIP40

The PPS-25 (also PPS25; Programmed Processor System - 25 Digits) was a family of 4-bit multi-chip microprocessor developed by Fairchild and released in 1971/2. The PPS-25 was designed for scientific calculations. While there is no definitive starting production date available, there is evidence pointing to early 1971/2 (some early books placing it ahead of the 4004 at the second quarter of 1971). This family was very short-lived as within a few years, Fairchild shifted their effort toward more advanced designs such as their macrologic families 4700/9400 and what became their flagship product, the F8.


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Overview[edit]

The PPS-25, Programmed Processor System - 25 Digits, was a 4-bit microprocessor system intended for scientific calculations. The system was 25-digit (100-bit) seriel, 4-bit parallel operating at 62.5 µs word time and 2.5 µs bit time. That is, the addition of two word (25-digit each) took 62.5 µs with multiplication being 50 ms.

The system supported up to 26 ROMs, each consisting of 256 micro-instructions.

Members[edit]

Family Members
Part Description
3805 ALU
3806 Control and timing unit
3808 Memory
3810 Program ROM

References[edit]

  • Jack Belzer, Albert G. Holzman, Allen Kent (Jul 1, 1978). Encyclopedia of Computer Science and Technology: Volume 10 - Linear and Matrix Algebra to Microorganisms: Computer-Assisted Identification. page 401
  • Zaks, Rodnay. "Microcomputer systems: A survey." Euromicro Newsletter 1.1 (1974): 9-13.
Facts about "PPS-25 - Fairchild"
designerFairchild Semiconductor +
full page namefairchild/pps-25 +
instance ofmicroprocessor family +
main designerFairchild Semiconductor +
manufacturerFairchild Semiconductor +
nameFairchild PPS-25 +
packageDIP40 +
technologypMOS +
word size4 bit (0.5 octets, 1 nibbles) +